gem5
 All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Groups Pages
Public Member Functions | Protected Member Functions | Protected Attributes | List of all members
FullO3CPU< Impl >::IcachePort Class Reference

IcachePort class for instruction fetch. More...

Inheritance diagram for FullO3CPU< Impl >::IcachePort:
MasterPort BaseMasterPort Port

Public Member Functions

 IcachePort (DefaultFetch< Impl > *_fetch, FullO3CPU< Impl > *_cpu)
 Default constructor. More...
 
- Public Member Functions inherited from MasterPort
 MasterPort (const std::string &name, MemObject *owner, PortID id=InvalidPortID)
 Master port. More...
 
virtual ~MasterPort ()
 
void bind (BaseSlavePort &slave_port)
 Bind this master port to a slave port. More...
 
void unbind ()
 Unbind this master port and the associated slave port. More...
 
Tick sendAtomic (PacketPtr pkt)
 Send an atomic request packet, where the data is moved and the state is updated in zero time, without interleaving with other memory accesses. More...
 
void sendFunctional (PacketPtr pkt)
 Send a functional request packet, where the data is instantly updated everywhere in the memory system, without affecting the current state of any block or moving the block. More...
 
bool sendTimingReq (PacketPtr pkt)
 Attempt to send a timing request to the slave port by calling its corresponding receive function. More...
 
bool sendTimingSnoopResp (PacketPtr pkt)
 Attempt to send a timing snoop response packet to the slave port by calling its corresponding receive function. More...
 
virtual void sendRetryResp ()
 Send a retry to the slave port that previously attempted a sendTimingResp to this master port and failed. More...
 
virtual bool isSnooping () const
 Determine if this master port is snooping or not. More...
 
AddrRangeList getAddrRanges () const
 Get the address ranges of the connected slave port. More...
 
void printAddr (Addr a)
 Inject a PrintReq for the given address to print the state of that address throughout the memory system. More...
 
- Public Member Functions inherited from BaseMasterPort
BaseSlavePortgetSlavePort () const
 
bool isConnected () const
 
- Public Member Functions inherited from Port
const std::string name () const
 Return port name (for DPRINTF). More...
 
PortID getId () const
 Get the port id. More...
 

Protected Member Functions

virtual bool recvTimingResp (PacketPtr pkt)
 Timing version of receive. More...
 
virtual void recvReqRetry ()
 Handles doing a retry of a failed fetch. More...
 
- Protected Member Functions inherited from MasterPort
virtual Tick recvAtomicSnoop (PacketPtr pkt)
 Receive an atomic snoop request packet from the slave port. More...
 
virtual void recvFunctionalSnoop (PacketPtr pkt)
 Receive a functional snoop request packet from the slave port. More...
 
virtual void recvTimingSnoopReq (PacketPtr pkt)
 Receive a timing snoop request from the slave port. More...
 
virtual void recvRetrySnoopResp ()
 Called by the slave port if sendTimingSnoopResp was called on this master port (causing recvTimingSnoopResp to be called on the slave port) and was unsuccesful. More...
 
virtual void recvRangeChange ()
 Called to receive an address range change from the peer slave port. More...
 
- Protected Member Functions inherited from BaseMasterPort
 BaseMasterPort (const std::string &name, MemObject *owner, PortID id=InvalidPortID)
 
virtual ~BaseMasterPort ()
 
- Protected Member Functions inherited from Port
 Port (const std::string &_name, MemObject &_owner, PortID _id)
 Abstract base class for ports. More...
 
virtual ~Port ()
 Virtual destructor due to inheritance. More...
 

Protected Attributes

DefaultFetch< Impl > * fetch
 Pointer to fetch. More...
 
- Protected Attributes inherited from BaseMasterPort
BaseSlavePort_baseSlavePort
 
- Protected Attributes inherited from Port
const PortID id
 A numeric identifier to distinguish ports in a vector, and set to InvalidPortID in case this port is not part of a vector. More...
 
MemObjectowner
 A reference to the MemObject that owns this port. More...
 

Detailed Description

template<class Impl>
class FullO3CPU< Impl >::IcachePort

IcachePort class for instruction fetch.

Definition at line 133 of file cpu.hh.

Constructor & Destructor Documentation

template<class Impl>
FullO3CPU< Impl >::IcachePort::IcachePort ( DefaultFetch< Impl > *  _fetch,
FullO3CPU< Impl > *  _cpu 
)
inline

Default constructor.

Definition at line 141 of file cpu.hh.

Member Function Documentation

template<class Impl>
void FullO3CPU< Impl >::IcachePort::recvReqRetry ( )
protectedvirtual

Handles doing a retry of a failed fetch.

Implements MasterPort.

Definition at line 107 of file cpu.cc.

References FullO3CPU< Impl >::fetch.

template<class Impl>
bool FullO3CPU< Impl >::IcachePort::recvTimingResp ( PacketPtr  pkt)
protectedvirtual

Timing version of receive.

Handles setting fetch to the proper status to start fetching.

Implements MasterPort.

Definition at line 94 of file cpu.cc.

References Packet::cacheResponding(), DPRINTF, FullO3CPU< Impl >::IcachePort::fetch, Packet::hasSharers(), Request::isUncacheable(), and Packet::req.

Member Data Documentation

template<class Impl>
DefaultFetch<Impl>* FullO3CPU< Impl >::IcachePort::fetch
protected

Pointer to fetch.

Definition at line 137 of file cpu.hh.

Referenced by FullO3CPU< Impl >::IcachePort::recvTimingResp().


The documentation for this class was generated from the following files:

Generated on Fri Jun 9 2017 13:04:10 for gem5 by doxygen 1.8.6