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arch
riscv
stacktrace.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Nathan Binkert
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*/
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#include "
arch/riscv/stacktrace.hh
"
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#include <string>
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#include "
base/trace.hh
"
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using namespace
std;
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namespace
RiscvISA {
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ProcessInfo::ProcessInfo(
ThreadContext
*_tc)
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{
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panic
(
"ProcessInfo constructor not implemented.\n"
);
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}
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Addr
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ProcessInfo::task(
Addr
ksp)
const
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{
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panic
(
"ProcessInfo::task not implemented.\n"
);
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return
0;
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}
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int
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ProcessInfo::pid(
Addr
ksp)
const
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{
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panic
(
"ProcessInfo::pid not implemented.\n"
);
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return
0;
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}
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string
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ProcessInfo::name
(
Addr
ksp)
const
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{
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panic
(
"ProcessInfo::name not implemented.\n"
);
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return
""
;
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}
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StackTrace::StackTrace()
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: tc(0),
stack
(64)
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{
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panic
(
"StackTrace constructor not implemented.\n"
);
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}
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StackTrace::StackTrace
(
ThreadContext
*_tc,
const
StaticInstPtr
&inst)
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: tc(0),
stack
(64)
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{
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panic
(
"StackTrace constructor not implemented.\n"
);
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}
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StackTrace::~StackTrace
()
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{
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panic
(
"StackTrace destructor not implemented.\n"
);
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}
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void
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StackTrace::trace
(
ThreadContext
*_tc,
bool
is_call)
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{
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panic
(
"StackTrace::trace not implemented.\n"
);
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}
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bool
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StackTrace::isEntry
(
Addr
addr
)
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{
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panic
(
"StackTrace::isEntry not implemented.\n"
);
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return
false
;
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}
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bool
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StackTrace::decodeStack
(
MachInst
inst,
int
&disp)
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{
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panic
(
"StackTrace::decodeStack not implemented.\n"
);
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return
false
;
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}
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bool
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StackTrace::decodeSave
(
MachInst
inst,
int
&
reg
,
int
&disp)
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{
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panic
(
"StackTrace::decodeSave not implemented.\n"
);
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return
true
;
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}
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/*
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* Decode the function prologue for the function we're in, and note
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* which registers are stored where, and how large the stack frame is.
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*/
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bool
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StackTrace::decodePrologue
(
Addr
sp
,
Addr
callpc,
Addr
func,
int
&
size
,
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Addr
&
ra
)
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{
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panic
(
"StackTrace::decodePrologue not implemented.\n"
);
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return
true
;
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}
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#if TRACING_ON
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void
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StackTrace::dump
()
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{
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panic
(
"StackTrace::dump not implemented.\n"
);
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}
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#endif
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}
// namespace RiscvISA
X86ISA::reg
Bitfield< 5, 3 > reg
Definition:
types.hh:89
RiscvISA::StackTrace::isEntry
bool isEntry(Addr addr)
Definition:
stacktrace.cc:90
name
const std::string & name()
Definition:
trace.cc:49
panic
#define panic(...)
Definition:
misc.hh:153
RiscvISA::StackTrace::~StackTrace
~StackTrace()
Definition:
stacktrace.cc:78
addr
ip6_addr_t addr
Definition:
inet.hh:335
RiscvISA::StackTrace::MachInst
TheISA::MachInst MachInst
Definition:
stacktrace.hh:61
stacktrace.hh
RiscvISA::StackTrace::trace
void trace(ThreadContext *tc, bool is_call)
Definition:
stacktrace.cc:84
RefCountingPtr< StaticInst >
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition:
thread_context.hh:93
RiscvISA::StackTrace::decodeSave
bool decodeSave(MachInst inst, int ®, int &disp)
Definition:
stacktrace.cc:104
trace.hh
RiscvISA::StackTrace::decodeStack
bool decodeStack(MachInst inst, int &disp)
Definition:
stacktrace.cc:97
RiscvISA::sp
Bitfield< 4 > sp
Definition:
pra_constants.hh:269
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
PowerISA::ra
Bitfield< 20, 16 > ra
Definition:
types.hh:47
X86ISA::stack
Bitfield< 17, 16 > stack
Definition:
misc.hh:588
X86ISA::size
int size()
Definition:
pagetable.hh:146
Stats::dump
void dump()
Dump all statistics data to the registered outputs.
Definition:
statistics.cc:517
RiscvISA::StackTrace::StackTrace
StackTrace()
Definition:
stacktrace.cc:66
RiscvISA::StackTrace::decodePrologue
bool decodePrologue(Addr sp, Addr callpc, Addr func, int &size, Addr &ra)
Definition:
stacktrace.cc:115
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