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gem5
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Specific non-templated derived class used for SimObject configuration. More...
#include <dummy_checker.hh>
Public Member Functions | |
| DummyChecker (Params *p) | |
 Public Member Functions inherited from CheckerCPU | |
| void | init () override |
| CheckerCPU (Params *p) | |
| virtual | ~CheckerCPU () |
| void | setSystem (System *system) |
| void | setIcachePort (MasterPort *icache_port) |
| void | setDcachePort (MasterPort *dcache_port) |
| MasterPort & | getDataPort () override |
| MasterPort & | getInstPort () override |
| TheISA::TLB * | getITBPtr () |
| TheISA::TLB * | getDTBPtr () |
| virtual Counter | totalInsts () const override |
| virtual Counter | totalOps () const override |
| void | serialize (CheckpointOut &cp) const override |
| void | unserialize (CheckpointIn &cp) override |
| void | setEA (Addr EA) override |
| Record the effective address of the instruction. More... | |
| Addr | getEA () const override |
| Get the effective address of the instruction. More... | |
| IntReg | readIntRegOperand (const StaticInst *si, int idx) override |
| Reads an integer register. More... | |
| FloatReg | readFloatRegOperand (const StaticInst *si, int idx) override |
| Reads a floating point register of single register width. More... | |
| FloatRegBits | readFloatRegOperandBits (const StaticInst *si, int idx) override |
| Reads a floating point register in its binary format, instead of by value. More... | |
| CCReg | readCCRegOperand (const StaticInst *si, int idx) override |
| template<class T > | |
| void | setResult (T t) |
| void | setIntRegOperand (const StaticInst *si, int idx, IntReg val) override |
| Sets an integer register to a value. More... | |
| void | setFloatRegOperand (const StaticInst *si, int idx, FloatReg val) override |
| Sets a floating point register of single width to a value. More... | |
| void | setFloatRegOperandBits (const StaticInst *si, int idx, FloatRegBits val) override |
| Sets the bits of a floating point register of single width to a binary value. More... | |
| void | setCCRegOperand (const StaticInst *si, int idx, CCReg val) override |
| bool | readPredicate () override |
| void | setPredicate (bool val) override |
| TheISA::PCState | pcState () const override |
| void | pcState (const TheISA::PCState &val) override |
| Addr | instAddr () |
| Addr | nextInstAddr () |
| MicroPC | microPC () |
| MiscReg | readMiscRegNoEffect (int misc_reg) const |
| MiscReg | readMiscReg (int misc_reg) override |
| Reads a miscellaneous register, handling any architectural side effects due to reading that register. More... | |
| void | setMiscRegNoEffect (int misc_reg, const MiscReg &val) |
| void | setMiscReg (int misc_reg, const MiscReg &val) override |
| Sets a miscellaneous register, handling any architectural side effects due to writing that register. More... | |
| MiscReg | readMiscRegOperand (const StaticInst *si, int idx) override |
| void | setMiscRegOperand (const StaticInst *si, int idx, const MiscReg &val) override |
| MiscReg | readRegOtherThread (int misc_reg, ThreadID tid) override |
| void | setRegOtherThread (int misc_reg, MiscReg val, ThreadID tid) override |
| void | recordPCChange (const TheISA::PCState &val) |
| void | demapPage (Addr vaddr, uint64_t asn) override |
| Invalidate a page in the DTLB and ITLB. More... | |
| void | armMonitor (Addr address) override |
| bool | mwait (PacketPtr pkt) override |
| void | mwaitAtomic (ThreadContext *tc) override |
| AddressMonitor * | getAddrMonitor () override |
| void | demapInstPage (Addr vaddr, uint64_t asn) |
| void | demapDataPage (Addr vaddr, uint64_t asn) |
| Fault | readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags) override |
| Fault | writeMem (uint8_t *data, unsigned size, Addr addr, Request::Flags flags, uint64_t *res) override |
| unsigned int | readStCondFailures () const override |
| Returns the number of consecutive store conditional failures. More... | |
| void | setStCondFailures (unsigned int sc_failures) override |
| Sets the number of consecutive store conditional failures. More... | |
| Fault | hwrei () override |
| Somewhat Alpha-specific function that handles returning from an error or interrupt. More... | |
| bool | simPalCheck (int palFunc) override |
| Check for special simulator handling of specific PAL calls. More... | |
| void | wakeup (ThreadID tid) override |
| void | syscall (int64_t callnum, Fault *fault) override |
| Executes a syscall specified by the callnum. More... | |
| void | handleError () |
| bool | checkFlags (Request *unverified_req, Addr vAddr, Addr pAddr, int flags) |
| Checks if the flags set by the Checker and Checkee match. More... | |
| void | dumpAndExit () |
| ThreadContext * | tcBase () override |
| Returns a pointer to the ThreadContext. More... | |
| SimpleThread * | threadBase () |
| Public Member Functions inherited from ExecContext | |
| virtual Fault | readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags) |
| Perform an atomic memory read operation. More... | |
| virtual Fault | initiateMemRead (Addr addr, unsigned int size, Request::Flags flags) |
| Initiate a timing memory read operation. More... | |
| virtual Fault | writeMem (uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res)=0 |
| For atomic-mode contexts, perform an atomic memory write operation. More... | |
Additional Inherited Members | |
| Public Types inherited from CheckerCPU | |
| typedef CheckerCPUParams | Params |
| Public Types inherited from ExecContext | |
| typedef TheISA::IntReg | IntReg |
| typedef TheISA::PCState | PCState |
| typedef TheISA::FloatReg | FloatReg |
| typedef TheISA::FloatRegBits | FloatRegBits |
| typedef TheISA::MiscReg | MiscReg |
| typedef TheISA::CCReg | CCReg |
| Static Public Member Functions inherited from BaseCPU | |
| static int | numSimulatedInsts () |
| static int | numSimulatedOps () |
| static void | wakeup (ThreadID tid) |
| Public Attributes inherited from CheckerCPU | |
| SimpleThread * | thread |
| Counter | numLoad |
| Counter | startNumLoad |
| Result | unverifiedResult |
| Request * | unverifiedReq |
| uint8_t * | unverifiedMemData |
| bool | changedPC |
| bool | willChangePC |
| TheISA::PCState | newPCState |
| bool | exitOnError |
| bool | updateOnError |
| bool | warnOnlyOnLoadError |
| InstSeqNum | youngestSN |
| Protected Types inherited from CheckerCPU | |
| typedef TheISA::MachInst | MachInst |
| typedef TheISA::FloatReg | FloatReg |
| typedef TheISA::FloatRegBits | FloatRegBits |
| typedef TheISA::MiscReg | MiscReg |
| Protected Member Functions inherited from CheckerCPU | |
| Addr | dbg_vtophys (Addr addr) |
| Protected Attributes inherited from CheckerCPU | |
| MasterID | masterId |
| id attached to all issued requests More... | |
| std::vector< Process * > | workload |
| System * | systemPtr |
| MasterPort * | icachePort |
| MasterPort * | dcachePort |
| ThreadContext * | tc |
| TheISA::TLB * | itb |
| TheISA::TLB * | dtb |
| std::queue< Result > | result |
| RequestPtr | memReq |
| StaticInstPtr | curStaticInst |
| StaticInstPtr | curMacroStaticInst |
| Counter | numInst |
| Counter | startNumInst |
| std::queue< int > | miscRegIdxs |
Specific non-templated derived class used for SimObject configuration.
Definition at line 48 of file dummy_checker.hh.
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inline |
Definition at line 51 of file dummy_checker.hh.