gem5
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The simple memory is a basic single-ported memory controller with a configurable throughput and latency. More...
#include <simple_mem.hh>
Classes | |
class | DeferredPacket |
A deferred packet stores a packet along with its scheduled transmission time. More... | |
class | MemoryPort |
Public Member Functions | |
SimpleMemory (const SimpleMemoryParams *p) | |
DrainState | drain () override |
Notify an object that it needs to drain its state. More... | |
BaseSlavePort & | getSlavePort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a slave port with a given name and index. More... | |
void | init () override |
Initialise this memory. More... | |
Public Member Functions inherited from AbstractMemory | |
AbstractMemory (const Params *p) | |
virtual | ~AbstractMemory () |
bool | isNull () const |
See if this is a null memory that should never store data and always return zero. More... | |
void | setBackingStore (uint8_t *pmem_addr) |
Set the host memory backing store to be used by this memory controller. More... | |
const std::list< LockedAddr > & | getLockedAddrList () const |
Get the list of locked addresses to allow checkpointing. More... | |
void | addLockedAddr (LockedAddr addr) |
Add a locked address to allow for checkpointing. More... | |
System * | system () const |
read the system pointer Implemented for completeness with the setter More... | |
void | system (System *sys) |
Set the system pointer on this memory This can't be done via a python parameter because the system needs pointers to all the memories and the reverse would create a cycle in the object graph. More... | |
const Params * | params () const |
AddrRange | getAddrRange () const |
Get the address range. More... | |
uint64_t | size () const |
Get the memory size. More... | |
Addr | start () const |
Get the start address. More... | |
bool | isConfReported () const |
Should this memory be passed to the kernel and part of the OS physical memory layout. More... | |
bool | isInAddrMap () const |
Some memories are used as shadow memories or should for other reasons not be part of the global address map. More... | |
bool | isKvmMap () const |
When shadow memories are in use, KVM may want to make one or the other, but cannot map both into the guest address space. More... | |
void | access (PacketPtr pkt) |
Perform an untimed memory access and update all the state (e.g. More... | |
void | functionalAccess (PacketPtr pkt) |
Perform an untimed memory read or write without changing anything but the memory itself. More... | |
void | regStats () override |
Register Statistics. More... | |
Public Member Functions inherited from MemObject | |
const Params * | params () const |
MemObject (const Params *params) | |
virtual BaseMasterPort & | getMasterPort (const std::string &if_name, PortID idx=InvalidPortID) |
Get a master port with a given name and index. More... | |
Public Member Functions inherited from ClockedObject | |
ClockedObject (const ClockedObjectParams *p) | |
const Params * | params () const |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
Enums::PwrState | pwrState () const |
std::string | pwrStateName () const |
std::vector< double > | pwrStateWeights () const |
Returns the percentage residency for each power state. More... | |
void | computeStats () |
Record stats values like state residency by computing the time difference from previous update. More... | |
void | pwrState (Enums::PwrState) |
void | regStats () override |
Register statistics for this object. More... | |
Public Member Functions inherited from SimObject | |
const Params * | params () const |
SimObject (const Params *_params) | |
virtual | ~SimObject () |
virtual const std::string | name () const |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. More... | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. More... | |
virtual void | resetStats () |
Reset statistics associated with this object. More... | |
virtual void | regProbePoints () |
Register probe points for this object. More... | |
virtual void | regProbeListeners () |
Register probe listeners for this object. More... | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. More... | |
virtual void | startup () |
startup() is the final initialization call before simulation. More... | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. More... | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. More... | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
Public Member Functions inherited from EventManager | |
EventManager (EventManager &em) | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick)-1) |
void | setCurTick (Tick newVal) |
Public Member Functions inherited from Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. More... | |
virtual void | notifyFork () |
Notify a child process of a fork. More... | |
Public Member Functions inherited from Clocked | |
void | updateClockPeriod () const |
Update the tick to the current tick. More... | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
Tick | recvAtomic (PacketPtr pkt) |
void | recvFunctional (PacketPtr pkt) |
bool | recvTimingReq (PacketPtr pkt) |
void | recvRespRetry () |
Protected Member Functions inherited from AbstractMemory | |
bool | checkLockedAddrList (PacketPtr pkt) |
void | trackLoadLocked (PacketPtr pkt) |
bool | writeOK (PacketPtr pkt) |
Protected Member Functions inherited from Drainable | |
Drainable () | |
virtual | ~Drainable () |
virtual void | drainResume () |
Resume execution after a successful drain. More... | |
void | signalDrainDone () const |
Signal that an object is drained. More... | |
Protected Member Functions inherited from Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. More... | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. More... | |
void | resetClock () const |
Reset the object's clock using the current global tick value. More... | |
Private Member Functions | |
void | release () |
Release the memory after being busy and send a retry if a request was rejected in the meanwhile. More... | |
void | dequeue () |
Dequeue a packet from our internal packet queue and move it to the port where it will be sent as soon as possible. More... | |
Tick | getLatency () const |
Detemine the latency. More... | |
Private Attributes | |
MemoryPort | port |
const Tick | latency |
Latency from that a request is accepted until the response is ready to be sent. More... | |
const Tick | latency_var |
Fudge factor added to the latency. More... | |
std::list< DeferredPacket > | packetQueue |
Internal (unbounded) storage to mimic the delay caused by the actual memory access. More... | |
const double | bandwidth |
Bandwidth in ticks per byte. More... | |
bool | isBusy |
Track the state of the memory as either idle or busy, no need for an enum with only two states. More... | |
bool | retryReq |
Remember if we have to retry an outstanding request that arrived while we were busy. More... | |
bool | retryResp |
Remember if we failed to send a response and are awaiting a retry. More... | |
EventWrapper< SimpleMemory,&SimpleMemory::release > | releaseEvent |
EventWrapper< SimpleMemory,&SimpleMemory::dequeue > | dequeueEvent |
std::unique_ptr< Packet > | pendingDelete |
Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More... | |
Additional Inherited Members | |
Public Types inherited from AbstractMemory | |
typedef AbstractMemoryParams | Params |
Public Types inherited from MemObject | |
typedef MemObjectParams | Params |
Public Types inherited from ClockedObject | |
typedef ClockedObjectParams | Params |
Parameters of ClockedObject. More... | |
Public Types inherited from SimObject | |
typedef SimObjectParams | Params |
Static Public Member Functions inherited from SimObject | |
static void | serializeAll (CheckpointOut &cp) |
Serialize all SimObjects in the system. More... | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. More... | |
Static Public Member Functions inherited from Serializable | |
static const std::string & | currentSection () |
Get the fully-qualified name of the active section. More... | |
static void | serializeAll (const std::string &cpt_dir) |
static void | unserializeGlobals (CheckpointIn &cp) |
Static Public Attributes inherited from Serializable | |
static int | ckptCount = 0 |
static int | ckptMaxCount = 0 |
static int | ckptPrevCount = -1 |
Protected Attributes inherited from AbstractMemory | |
AddrRange | range |
uint8_t * | pmemAddr |
const bool | confTableReported |
const bool | inAddrMap |
const bool | kvmMap |
std::list< LockedAddr > | lockedAddrList |
Stats::Vector | bytesRead |
Number of total bytes read from this memory. More... | |
Stats::Vector | bytesInstRead |
Number of instruction bytes read from this memory. More... | |
Stats::Vector | bytesWritten |
Number of bytes written to this memory. More... | |
Stats::Vector | numReads |
Number of read requests. More... | |
Stats::Vector | numWrites |
Number of write requests. More... | |
Stats::Vector | numOther |
Number of other requests. More... | |
Stats::Formula | bwRead |
Read bandwidth from this memory. More... | |
Stats::Formula | bwInstRead |
Read bandwidth from this memory. More... | |
Stats::Formula | bwWrite |
Write bandwidth from this memory. More... | |
Stats::Formula | bwTotal |
Total bandwidth from this memory. More... | |
System * | _system |
Pointor to the System object. More... | |
Protected Attributes inherited from ClockedObject | |
Enums::PwrState | _currPwrState |
To keep track of the current power state. More... | |
Tick | prvEvalTick |
Stats::Scalar | numPwrStateTransitions |
Stats::Distribution | pwrStateClkGateDist |
Stats::Vector | pwrStateResidencyTicks |
Protected Attributes inherited from SimObject | |
const SimObjectParams * | _params |
Cached copy of the object parameters. More... | |
Protected Attributes inherited from EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. More... | |
The simple memory is a basic single-ported memory controller with a configurable throughput and latency.
Definition at line 64 of file simple_mem.hh.
SimpleMemory::SimpleMemory | ( | const SimpleMemoryParams * | p | ) |
Definition at line 53 of file simple_mem.cc.
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private |
Dequeue a packet from our internal packet queue and move it to the port where it will be sent as soon as possible.
Definition at line 196 of file simple_mem.cc.
References curTick(), dequeueEvent, DPRINTF, Draining, Drainable::drainState(), packetQueue, port, EventManager::reschedule(), retryResp, SlavePort::sendTimingResp(), and Drainable::signalDrainDone().
Referenced by recvRespRetry().
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overridevirtual |
Notify an object that it needs to drain its state.
If the object does not need further simulation to drain internal buffers, it returns DrainState::Drained and automatically switches to the Drained state. If the object needs more simulation, it returns DrainState::Draining and automatically enters the Draining state. Other return values are invalid.
Implements Drainable.
Definition at line 246 of file simple_mem.cc.
References DPRINTF, Drained, Draining, and packetQueue.
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Detemine the latency.
Definition at line 221 of file simple_mem.cc.
References latency, latency_var, Random::random(), and random_mt.
Referenced by recvAtomic(), and recvTimingReq().
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overridevirtual |
Get a slave port with a given name and index.
This is used at binding time and returns a reference to a protocol-agnostic base master port.
if_name | Port name |
idx | Index in the case of a VectorPort |
Reimplemented from MemObject.
Definition at line 236 of file simple_mem.cc.
References MemObject::getSlavePort(), and port.
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overridevirtual |
Initialise this memory.
Reimplemented from AbstractMemory.
Definition at line 63 of file simple_mem.cc.
References AbstractMemory::init(), BaseSlavePort::isConnected(), port, and SlavePort::sendRangeChange().
Definition at line 75 of file simple_mem.cc.
References AbstractMemory::access(), Packet::cacheResponding(), getLatency(), and panic_if().
Referenced by recvTimingReq().
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protected |
Definition at line 85 of file simple_mem.cc.
References Packet::checkFunctional(), AbstractMemory::functionalAccess(), SimObject::name(), MipsISA::p, packetQueue, Packet::popLabel(), and Packet::pushLabel().
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Definition at line 228 of file simple_mem.cc.
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Definition at line 103 of file simple_mem.cc.
References bandwidth, Packet::cacheResponding(), Packet::cmdString(), curTick(), dequeueEvent, Packet::getAddr(), getLatency(), Packet::getSize(), Packet::headerDelay, ArmISA::i, isBusy, Packet::isRead(), Packet::isResponse(), Packet::isWrite(), Packet::needsResponse(), packetQueue, panic_if(), Packet::payloadDelay, pendingDelete, recvAtomic(), releaseEvent, retryReq, retryResp, EventManager::schedule(), and Event::scheduled().
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Release the memory after being busy and send a retry if a request was rejected in the meanwhile.
Definition at line 185 of file simple_mem.cc.
References isBusy, port, retryReq, and SlavePort::sendRetryReq().
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Bandwidth in ticks per byte.
The regulation affects the acceptance rate of requests and the queueing takes place after the regulation.
Definition at line 135 of file simple_mem.hh.
Referenced by recvTimingReq().
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Definition at line 169 of file simple_mem.hh.
Referenced by dequeue(), and recvTimingReq().
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Track the state of the memory as either idle or busy, no need for an enum with only two states.
Definition at line 141 of file simple_mem.hh.
Referenced by recvTimingReq(), and release().
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Latency from that a request is accepted until the response is ready to be sent.
Definition at line 116 of file simple_mem.hh.
Referenced by getLatency().
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Fudge factor added to the latency.
Definition at line 121 of file simple_mem.hh.
Referenced by getLatency().
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Internal (unbounded) storage to mimic the delay caused by the actual memory access.
Note that this is where the packet spends the memory latency.
Definition at line 128 of file simple_mem.hh.
Referenced by dequeue(), drain(), recvFunctional(), and recvTimingReq().
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Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call.
Definition at line 182 of file simple_mem.hh.
Referenced by recvTimingReq().
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Definition at line 110 of file simple_mem.hh.
Referenced by dequeue(), getSlavePort(), init(), and release().
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Definition at line 161 of file simple_mem.hh.
Referenced by recvTimingReq().
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Remember if we have to retry an outstanding request that arrived while we were busy.
Definition at line 147 of file simple_mem.hh.
Referenced by recvTimingReq(), and release().
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Remember if we failed to send a response and are awaiting a retry.
This is only used as a check.
Definition at line 153 of file simple_mem.hh.
Referenced by dequeue(), recvRespRetry(), and recvTimingReq().