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SparcISA::TLB Class Reference

#include <tlb.hh>

Inheritance diagram for SparcISA::TLB:
BaseTLB SimObject EventManager Serializable Drainable

Public Types

typedef SparcTLBParams Params
 
- Public Types inherited from BaseTLB
enum  Mode { Read, Write, Execute }
 
- Public Types inherited from SimObject
typedef SimObjectParams Params
 

Public Member Functions

TlbEntrylookup (Addr va, int partition_id, bool real, int context_id=0, bool update_used=true)
 lookup an entry in the TLB based on the partition id, and real bit if real is true or the partition id, and context id if real is false. More...
 
void flushAll () override
 Remove all entries from the TLB. More...
 
 TLB (const Params *p)
 
void takeOverFrom (BaseTLB *otlb) override
 Take over from an old tlb context. More...
 
void demapPage (Addr vaddr, uint64_t asn) override
 
void dumpAll ()
 
Fault translateAtomic (RequestPtr req, ThreadContext *tc, Mode mode)
 
void translateTiming (RequestPtr req, ThreadContext *tc, Translation *translation, Mode mode)
 
Fault translateFunctional (RequestPtr req, ThreadContext *tc, Mode mode)
 Stub function for compilation support with CheckerCPU. More...
 
Fault finalizePhysical (RequestPtr req, ThreadContext *tc, Mode mode) const
 
Cycles doMmuRegRead (ThreadContext *tc, Packet *pkt)
 
Cycles doMmuRegWrite (ThreadContext *tc, Packet *pkt)
 
void GetTsbPtr (ThreadContext *tc, Addr addr, int ctx, Addr *ptrs)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
uint64_t TteRead (int entry)
 Give an entry id, read that tlb entries' tte. More...
 
- Public Member Functions inherited from BaseTLB
virtual BaseMasterPortgetMasterPort ()
 Get the table walker master port if present. More...
 
void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
- Public Member Functions inherited from SimObject
const Paramsparams () const
 
 SimObject (const Params *_params)
 
virtual ~SimObject ()
 
virtual const std::string name () const
 
virtual void init ()
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regStats ()
 Register statistics for this object. More...
 
virtual void resetStats ()
 Reset statistics associated with this object. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from EventManager
 EventManager (EventManager &em)
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick)-1)
 
void setCurTick (Tick newVal)
 
- Public Member Functions inherited from Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 

Protected Types

enum  FaultTypes {
  OtherFault = 0, PrivViolation = 0x1, SideEffect = 0x2, AtomicToIo = 0x4,
  IllegalAsi = 0x8, LoadFromNfo = 0x10, VaOutOfRange = 0x20, VaOutOfRangeJmp = 0x40
}
 
enum  ContextType { Primary = 0, Secondary = 1, Nucleus = 2 }
 
enum  TsbPageSize { Ps0, Ps1 }
 
typedef TlbMap::iterator MapIter
 

Protected Member Functions

void insert (Addr vpn, int partition_id, int context_id, bool real, const PageTableEntry &PTE, int entry=-1)
 Insert a PTE into the TLB. More...
 
uint64_t TagRead (int entry)
 Given an entry id, read that tlb entries' tag. More...
 
void demapAll (int partition_id)
 Remove all non-locked entries from the tlb that match partition id. More...
 
void demapContext (int partition_id, int context_id)
 Remove all entries that match a given context/partition id. More...
 
void demapPage (Addr va, int partition_id, bool real, int context_id)
 Remve all entries that match a certain partition id, (contextid), and va). More...
 
bool validVirtualAddress (Addr va, bool am)
 Checks if the virtual address provided is a valid one. More...
 
void writeSfsr (bool write, ContextType ct, bool se, FaultTypes ft, int asi)
 
void clearUsedBits ()
 
void writeTagAccess (Addr va, int context)
 
Fault translateInst (RequestPtr req, ThreadContext *tc)
 
Fault translateData (RequestPtr req, ThreadContext *tc, bool write)
 
- Protected Member Functions inherited from BaseTLB
 BaseTLB (const Params *p)
 
- Protected Member Functions inherited from Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 

Protected Attributes

uint64_t sfar
 
uint64_t c0_tsb_ps0
 
uint64_t c0_tsb_ps1
 
uint64_t c0_config
 
uint64_t cx_tsb_ps0
 
uint64_t cx_tsb_ps1
 
uint64_t cx_config
 
uint64_t sfsr
 
uint64_t tag_access
 
TlbMap lookupTable
 
TlbEntrytlb
 
int size
 
int usedEntries
 
int lastReplaced
 
uint64_t cacheState
 
bool cacheValid
 
std::list< TlbEntry * > freeList
 
- Protected Attributes inherited from SimObject
const SimObjectParams * _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Private Member Functions

void writeSfsr (Addr a, bool write, ContextType ct, bool se, FaultTypes ft, int asi)
 
uint64_t MakeTsbPtr (TsbPageSize ps, uint64_t tag_access, uint64_t c0_tsb, uint64_t c0_config, uint64_t cX_tsb, uint64_t cX_config)
 

Private Attributes

TlbEntrycacheEntry [2]
 
ASI cacheAsi [2]
 

Friends

class FastInstructionAccessMMUMiss
 
class FastDataAccessMMUMiss
 

Additional Inherited Members

- Static Public Member Functions inherited from SimObject
static void serializeAll (CheckpointOut &cp)
 Serialize all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
- Static Public Member Functions inherited from Serializable
static const std::string & currentSection ()
 Get the fully-qualified name of the active section. More...
 
static void serializeAll (const std::string &cpt_dir)
 
static void unserializeGlobals (CheckpointIn &cp)
 
- Static Public Attributes inherited from Serializable
static int ckptCount = 0
 
static int ckptMaxCount = 0
 
static int ckptPrevCount = -1
 

Detailed Description

Definition at line 47 of file tlb.hh.

Member Typedef Documentation

Definition at line 67 of file tlb.hh.

typedef SparcTLBParams SparcISA::TLB::Params

Definition at line 153 of file tlb.hh.

Member Enumeration Documentation

Enumerator
Primary 
Secondary 
Nucleus 

Definition at line 92 of file tlb.hh.

enum SparcISA::TLB::FaultTypes
protected
Enumerator
OtherFault 
PrivViolation 
SideEffect 
AtomicToIo 
IllegalAsi 
LoadFromNfo 
VaOutOfRange 
VaOutOfRangeJmp 

Definition at line 81 of file tlb.hh.

Enumerator
Ps0 
Ps1 

Definition at line 98 of file tlb.hh.

Constructor & Destructor Documentation

SparcISA::TLB::TLB ( const Params p)

Member Function Documentation

void SparcISA::TLB::clearUsedBits ( )
protected
void SparcISA::TLB::demapAll ( int  partition_id)
protected

Remove all non-locked entries from the tlb that match partition id.

Definition at line 308 of file tlb.cc.

References cacheValid, DPRINTF, SparcISA::TlbMap::erase(), freeList, lookupTable, SparcISA::TlbRange::partitionId, SparcISA::TlbEntry::range, size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbEntry::valid, and X86ISA::x.

Referenced by doMmuRegWrite().

void SparcISA::TLB::demapContext ( int  partition_id,
int  context_id 
)
protected

Remove all entries that match a given context/partition id.

Definition at line 286 of file tlb.cc.

References cacheValid, DPRINTF, SparcISA::TlbMap::erase(), freeList, lookupTable, SparcISA::TlbRange::partitionId, SparcISA::TlbEntry::range, size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbEntry::valid, and X86ISA::x.

Referenced by doMmuRegWrite().

void SparcISA::TLB::demapPage ( Addr  va,
int  partition_id,
bool  real,
int  context_id 
)
protected
void SparcISA::TLB::demapPage ( Addr  vaddr,
uint64_t  asn 
)
inlineoverridevirtual

Implements BaseTLB.

Definition at line 159 of file tlb.hh.

References panic.

Cycles SparcISA::TLB::doMmuRegRead ( ThreadContext tc,
Packet pkt 
)

Definition at line 865 of file tlb.cc.

References SparcISA::ASI_DMMU, SparcISA::ASI_DMMU_CTXT_NONZERO_CONFIG, SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0, SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS1, SparcISA::ASI_DMMU_CTXT_ZERO_CONFIG, SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0, SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1, SparcISA::ASI_DMMU_TSB_PS0_PTR_REG, SparcISA::ASI_DMMU_TSB_PS1_PTR_REG, SparcISA::ASI_HYP_SCRATCHPAD, SparcISA::ASI_IMMU, SparcISA::ASI_IMMU_CTXT_NONZERO_CONFIG, SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0, SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1, SparcISA::ASI_IMMU_CTXT_ZERO_CONFIG, SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0, SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1, SparcISA::ASI_IMMU_TSB_PS0_PTR_REG, SparcISA::ASI_IMMU_TSB_PS1_PTR_REG, SparcISA::ASI_LSU_CONTROL_REG, SparcISA::ASI_MMU, SparcISA::ASI_QUEUE, SparcISA::ASI_SCRATCHPAD, SparcISA::ASI_SPARC_ERROR_STATUS_REG, SparcISA::ASI_SWVR_INTR_RECEIVE, SparcISA::ASI_SWVR_UDB_INTR_R, bits(), c0_config, c0_tsb_ps0, c0_tsb_ps1, cx_config, cx_tsb_ps0, cx_tsb_ps1, DPRINTF, findMsbSet(), SparcISA::Interrupts::get_vec(), Packet::getAddr(), Request::getArchFlags(), ThreadContext::getCpuPtr(), ThreadContext::getITBPtr(), SparcISA::IT_INT_VEC, Packet::makeAtomicResponse(), MakeTsbPtr(), SparcISA::MISCREG_MMU_LSU_CTRL, SparcISA::MISCREG_MMU_P_CONTEXT, SparcISA::MISCREG_MMU_PART_ID, SparcISA::MISCREG_MMU_S_CONTEXT, SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, SparcISA::MISCREG_SCRATCHPAD_R0, panic, Ps0, Ps1, ThreadContext::readMiscReg(), Packet::req, Packet::set(), sfar, sfsr, tag_access, and ArmISA::va.

Cycles SparcISA::TLB::doMmuRegWrite ( ThreadContext tc,
Packet pkt 
)

Definition at line 1050 of file tlb.cc.

References SparcISA::ASI_DMMU, SparcISA::ASI_DMMU_CTXT_NONZERO_CONFIG, SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0, SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS1, SparcISA::ASI_DMMU_CTXT_ZERO_CONFIG, SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0, SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1, SparcISA::ASI_DMMU_DEMAP, SparcISA::ASI_DTLB_DATA_ACCESS_REG, SparcISA::ASI_DTLB_DATA_IN_REG, SparcISA::ASI_HYP_SCRATCHPAD, SparcISA::ASI_IMMU, SparcISA::ASI_IMMU_CTXT_NONZERO_CONFIG, SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0, SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1, SparcISA::ASI_IMMU_CTXT_ZERO_CONFIG, SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0, SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1, SparcISA::ASI_IMMU_DEMAP, SparcISA::ASI_ITLB_DATA_ACCESS_REG, SparcISA::ASI_ITLB_DATA_IN_REG, SparcISA::ASI_LSU_CONTROL_REG, SparcISA::ASI_MMU, SparcISA::ASI_QUEUE, SparcISA::ASI_SCRATCHPAD, SparcISA::ASI_SPARC_ERROR_EN_REG, SparcISA::ASI_SPARC_ERROR_STATUS_REG, SparcISA::ASI_SWVR_INTR_RECEIVE, SparcISA::ASI_SWVR_UDB_INTR_W, bits(), c0_config, c0_tsb_ps0, c0_tsb_ps1, cx_config, cx_tsb_ps0, cx_tsb_ps1, data, demapAll(), demapContext(), demapPage(), DPRINTF, findMsbSet(), Packet::get(), SparcISA::Interrupts::get_vec(), Packet::getAddr(), Request::getArchFlags(), ThreadContext::getCpuPtr(), ThreadContext::getITBPtr(), ThreadContext::getSystemPtr(), ignore(), inform, insert(), SparcISA::IT_INT_VEC, Packet::makeAtomicResponse(), mbits(), SparcISA::MISCREG_MMU_LSU_CTRL, SparcISA::MISCREG_MMU_P_CONTEXT, SparcISA::MISCREG_MMU_PART_ID, SparcISA::MISCREG_MMU_S_CONTEXT, SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, SparcISA::MISCREG_SCRATCHPAD_R0, panic, SparcISA::PageTableEntry::populate(), ThreadContext::readMiscReg(), Packet::req, ThreadContext::setMiscReg(), sfsr, SparcISA::PageTableEntry::sun4u, SparcISA::PageTableEntry::sun4v, tag_access, System::threadContexts, and ArmISA::va.

void SparcISA::TLB::dumpAll ( )
Fault SparcISA::TLB::finalizePhysical ( RequestPtr  req,
ThreadContext tc,
Mode  mode 
) const

Definition at line 859 of file tlb.cc.

References NoFault.

void SparcISA::TLB::flushAll ( )
overridevirtual

Remove all entries from the TLB.

Implements BaseTLB.

Definition at line 327 of file tlb.cc.

References cacheValid, SparcISA::TlbMap::clear(), freeList, lookupTable, size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbEntry::valid, and X86ISA::x.

void SparcISA::TLB::GetTsbPtr ( ThreadContext tc,
Addr  addr,
int  ctx,
Addr ptrs 
)
void SparcISA::TLB::insert ( Addr  vpn,
int  partition_id,
int  context_id,
bool  real,
const PageTableEntry PTE,
int  entry = -1 
)
protected
TlbEntry * SparcISA::TLB::lookup ( Addr  va,
int  partition_id,
bool  real,
int  context_id = 0,
bool  update_used = true 
)

lookup an entry in the TLB based on the partition id, and real bit if real is true or the partition id, and context id if real is false.

Parameters
vathe virtual address not shifted (e.g. bottom 13 bits are 0)
paritition_idpartition this entry is for
realis this a real->phys or virt->phys translation
context_idif this is virt->phys what context
update_usedshould ew update the used bits in the entries on not useful if we are trying to do a va->pa without mucking with any state for a debug read for example.
Returns
A pointer to a tlb entry

Definition at line 196 of file tlb.cc.

References clearUsedBits(), SparcISA::TlbRange::contextId, DPRINTF, SparcISA::TlbMap::end(), SparcISA::TlbMap::find(), ArmISA::i, lookupTable, SparcISA::PageTableEntry::paddr(), SparcISA::TlbRange::partitionId, SparcISA::TlbEntry::pte, SparcISA::TlbRange::real, size, SparcISA::PageTableEntry::size(), SparcISA::TlbRange::size, ArmISA::t, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbRange::va, and ArmISA::va.

Referenced by translateData(), translateInst(), and SparcISA::vtophys().

uint64_t SparcISA::TLB::MakeTsbPtr ( TsbPageSize  ps,
uint64_t  tag_access,
uint64_t  c0_tsb,
uint64_t  c0_config,
uint64_t  cX_tsb,
uint64_t  cX_config 
)
private

Definition at line 1330 of file tlb.cc.

References bits(), c0_config, ArmISA::mask, mbits(), Ps0, Ps1, and ULL.

Referenced by doMmuRegRead(), and GetTsbPtr().

void SparcISA::TLB::serialize ( CheckpointOut cp) const
overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters
cpCheckpoint state

Implements Serializable.

Definition at line 1357 of file tlb.cc.

References c0_config, c0_tsb_ps0, c0_tsb_ps1, csprintf(), cx_config, cx_tsb_ps0, cx_tsb_ps1, freeList, lastReplaced, SparcISA::TlbEntry::serialize(), SERIALIZE_CONTAINER, SERIALIZE_SCALAR, sfar, sfsr, size, tag_access, tlb, usedEntries, and X86ISA::x.

uint64_t SparcISA::TLB::TagRead ( int  entry)
protected

Given an entry id, read that tlb entries' tag.

Definition at line 355 of file tlb.cc.

References SparcISA::TlbRange::contextId, SparcISA::TlbEntry::range, SparcISA::TlbRange::real, size, tlb, ULL, and SparcISA::TlbRange::va.

void SparcISA::TLB::takeOverFrom ( BaseTLB otlb)
inlineoverridevirtual

Take over from an old tlb context.

Implements BaseTLB.

Definition at line 156 of file tlb.hh.

Fault SparcISA::TLB::translateAtomic ( RequestPtr  req,
ThreadContext tc,
Mode  mode 
)

Definition at line 835 of file tlb.cc.

References BaseTLB::Execute, translateData(), translateInst(), and BaseTLB::Write.

Referenced by translateTiming().

Fault SparcISA::TLB::translateData ( RequestPtr  req,
ThreadContext tc,
bool  write 
)
protected

Normal flow ends here.

Definition at line 531 of file tlb.cc.

References SparcISA::ASI_IMPLICIT, SparcISA::ASI_N, SparcISA::ASI_P, SparcISA::ASI_S, SparcISA::ASI_SWVR_UDB_INTR_R, SparcISA::ASI_SWVR_UDB_INTR_W, SparcISA::asiIsAsIfUser(), SparcISA::asiIsBlock(), SparcISA::asiIsCmt(), SparcISA::asiIsHPriv(), SparcISA::asiIsInterrupt(), SparcISA::asiIsLittle(), SparcISA::asiIsMmu(), SparcISA::asiIsNoFault(), SparcISA::asiIsNucleus(), SparcISA::asiIsPartialStore(), SparcISA::asiIsPrimary(), SparcISA::asiIsQueue(), SparcISA::asiIsReal(), SparcISA::asiIsScratchPad(), SparcISA::asiIsSecondary(), SparcISA::asiIsSparcError(), SparcISA::asiIsTwin(), SparcISA::asiIsUnPriv(), bits(), cacheAsi, cacheEntry, cacheState, cacheValid, MipsISA::ce, DPRINTF, ArmISA::e, freeList, FullSystem, Request::getArchFlags(), Request::getPaddr(), Request::getSize(), Request::getVaddr(), SparcISA::hpriv, IllegalAsi, LoadFromNfo, lookup(), lookupTable, SparcISA::MISCREG_TLB_DATA, Request::MMAPPED_IPR, SparcISA::PageTableEntry::nofault(), NoFault, Nucleus, OtherFault, SparcISA::PageTableEntry::paddr(), SparcISA::PAddrImplMask, panic, Primary, SparcISA::priv, SparcISA::PageTableEntry::priv(), PrivViolation, SparcISA::TlbEntry::pte, SparcISA::TlbEntry::range, ThreadContext::readMiscRegNoEffect(), SparcISA::red, Secondary, Request::setFlags(), Request::setPaddr(), SideEffect, SparcISA::PageTableEntry::sideffect(), size, SparcISA::TlbMap::size(), Request::STRICT_ORDER, MipsISA::tl, SparcISA::PageTableEntry::translate(), Request::UNCACHEABLE, SparcISA::TlbRange::va, MipsISA::vaddr, SparcISA::VAddrAMask, SparcISA::TlbEntry::valid, validVirtualAddress(), VaOutOfRange, SparcISA::PageTableEntry::writable(), writeSfsr(), and writeTagAccess().

Referenced by translateAtomic().

Fault SparcISA::TLB::translateFunctional ( RequestPtr  req,
ThreadContext tc,
Mode  mode 
)

Stub function for compilation support with CheckerCPU.

SPARC ISA does not support the Checker model at the moment

Definition at line 852 of file tlb.cc.

References NoFault, and panic.

Fault SparcISA::TLB::translateInst ( RequestPtr  req,
ThreadContext tc 
)
protected
void SparcISA::TLB::translateTiming ( RequestPtr  req,
ThreadContext tc,
Translation translation,
Mode  mode 
)

Definition at line 844 of file tlb.cc.

References BaseTLB::Translation::finish(), and translateAtomic().

uint64_t SparcISA::TLB::TteRead ( int  entry)

Give an entry id, read that tlb entries' tte.

Definition at line 342 of file tlb.cc.

References panic, SparcISA::TlbEntry::pte, size, and tlb.

void SparcISA::TLB::unserialize ( CheckpointIn cp)
overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters
cpCheckpoint state

Implements Serializable.

Definition at line 1387 of file tlb.cc.

References c0_config, c0_tsb_ps0, c0_tsb_ps1, SparcISA::TlbMap::clear(), csprintf(), cx_config, cx_tsb_ps0, cx_tsb_ps1, freeList, SparcISA::TlbMap::insert(), lastReplaced, lookupTable, panic, paramIn(), sfar, sfsr, size, tag_access, tlb, SparcISA::TlbEntry::unserialize(), UNSERIALIZE_CONTAINER, UNSERIALIZE_SCALAR, usedEntries, and X86ISA::x.

bool SparcISA::TLB::validVirtualAddress ( Addr  va,
bool  am 
)
protected

Checks if the virtual address provided is a valid one.

Definition at line 371 of file tlb.cc.

References SparcISA::EndVAddrHole, and SparcISA::StartVAddrHole.

Referenced by translateData(), and translateInst().

void SparcISA::TLB::writeSfsr ( bool  write,
ContextType  ct,
bool  se,
FaultTypes  ft,
int  asi 
)
protected

Definition at line 381 of file tlb.cc.

References sfsr.

Referenced by translateData(), translateInst(), and writeSfsr().

void SparcISA::TLB::writeSfsr ( Addr  a,
bool  write,
ContextType  ct,
bool  se,
FaultTypes  ft,
int  asi 
)
private

Definition at line 407 of file tlb.cc.

References ArmISA::a, DPRINTF, sfar, and writeSfsr().

void SparcISA::TLB::writeTagAccess ( Addr  va,
int  context 
)
protected

Definition at line 398 of file tlb.cc.

References DPRINTF, mbits(), and tag_access.

Referenced by translateData(), and translateInst().

Friends And Related Function Documentation

friend class FastDataAccessMMUMiss
friend

Definition at line 51 of file tlb.hh.

friend class FastInstructionAccessMMUMiss
friend

Definition at line 50 of file tlb.hh.

Member Data Documentation

uint64_t SparcISA::TLB::c0_config
protected

Definition at line 59 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), MakeTsbPtr(), serialize(), TLB(), and unserialize().

uint64_t SparcISA::TLB::c0_tsb_ps0
protected

Definition at line 57 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), serialize(), TLB(), and unserialize().

uint64_t SparcISA::TLB::c0_tsb_ps1
protected

Definition at line 58 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), serialize(), TLB(), and unserialize().

ASI SparcISA::TLB::cacheAsi[2]
private

Definition at line 194 of file tlb.hh.

Referenced by translateData().

TlbEntry* SparcISA::TLB::cacheEntry[2]
private

Definition at line 193 of file tlb.hh.

Referenced by TLB(), translateData(), and translateInst().

uint64_t SparcISA::TLB::cacheState
protected

Definition at line 76 of file tlb.hh.

Referenced by translateData(), and translateInst().

bool SparcISA::TLB::cacheValid
protected

Definition at line 77 of file tlb.hh.

Referenced by demapAll(), demapContext(), demapPage(), flushAll(), insert(), translateData(), and translateInst().

uint64_t SparcISA::TLB::cx_config
protected

Definition at line 62 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), serialize(), TLB(), and unserialize().

uint64_t SparcISA::TLB::cx_tsb_ps0
protected

Definition at line 60 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), serialize(), TLB(), and unserialize().

uint64_t SparcISA::TLB::cx_tsb_ps1
protected

Definition at line 61 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), serialize(), TLB(), and unserialize().

std::list<TlbEntry*> SparcISA::TLB::freeList
protected
int SparcISA::TLB::lastReplaced
protected

Definition at line 74 of file tlb.hh.

Referenced by insert(), serialize(), and unserialize().

TlbMap SparcISA::TLB::lookupTable
protected
uint64_t SparcISA::TLB::sfar
protected

Definition at line 56 of file tlb.hh.

Referenced by doMmuRegRead(), serialize(), TLB(), unserialize(), and writeSfsr().

uint64_t SparcISA::TLB::sfsr
protected

Definition at line 63 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), serialize(), TLB(), unserialize(), and writeSfsr().

int SparcISA::TLB::size
protected
uint64_t SparcISA::TLB::tag_access
protected

Definition at line 64 of file tlb.hh.

Referenced by doMmuRegRead(), doMmuRegWrite(), GetTsbPtr(), serialize(), TLB(), unserialize(), and writeTagAccess().

TlbEntry* SparcISA::TLB::tlb
protected
int SparcISA::TLB::usedEntries
protected

The documentation for this class was generated from the following files:

Generated on Fri Jun 9 2017 13:04:37 for gem5 by doxygen 1.8.6