- o -
- obj
: ArmISA::PMU::EventType
- object
: CpuEventWrapper< T, F >
, EventWrapper< T, F >
, MakeCallback< T, F >
, ProbeListenerArg< T, Arg >
, ProbeManager
, Stats::MethodProxy< T, V >
, Ticked
- objectParamsByName
: CxxConfigManager
- objectsByName
: CxxConfigManager
- objectsInOrder
: CxxConfigManager
- objFile
: Process
- objName
: DistEtherLink::Link
, EtherLink::Link
, EtherSwitch::Interface::PortFifo
, EventQueue
- objNameResolver
: CheckpointIn
- occupancies
: BaseTags
- occupanciesTaskId
: BaseTags
- occupancy
: BaseXBar::Layer< SrcType, DstType >
, Minor::SelfStallingPipeline< ElemType, ReportTraits, BubbleTraits >
- oemap
: FDArray
- oemID
: X86ISA::ACPI::RSDP
, X86ISA::ACPI::SysDescTable
, X86ISA::IntelMP::ConfigTable
- oemRevision
: X86ISA::ACPI::SysDescTable
- oemTableAddr
: X86ISA::IntelMP::ConfigTable
- oemTableID
: X86ISA::ACPI::SysDescTable
- oemTableSize
: X86ISA::IntelMP::ConfigTable
- oeSet
: PowerISA::IntOp
- OFF_DEVICE_FEATURES
: PciVirtIO
- OFF_DEVICE_STATUS
: PciVirtIO
- OFF_GUEST_FEATURES
: PciVirtIO
- OFF_ISR_STATUS
: PciVirtIO
- OFF_QUEUE_ADDRESS
: PciVirtIO
- OFF_QUEUE_NOTIFY
: PciVirtIO
- OFF_QUEUE_SELECT
: PciVirtIO
- OFF_QUEUE_SIZE
: PciVirtIO
- OFF_VIO_DEVICE
: PciVirtIO
- offlg
: Net::ip6_opt_fragment
- offset
: AddrOperandBase
, ArmISA::ArmFault::FaultVals
, ArmISA::Decoder
, ArmISA::MemoryReg64
, Bitmap::FileHeader
, Brig::BrigOperandAddress
, HDLcd
, Intel8254Timer::Counter
, MC146818::RTCEvent
, MC146818::RTCTickEvent
, MipsISA::MipsFaultBase::FaultVals
, OPTR
, PixelConverter::Channel
, Stats::VectorProxy< Stat >
, StorageElement
, UFSHostDevice::SCSIReply
, UFSHostDevice::transferInfo
, X86ISA::Decoder
- offsetBits
: StoreSet
- OffsetMask
: MipsISA::PTE
- offsetMask
: PageTableBase
- OffsetMask
: PowerISA::PTE
, RiscvISA::PTE
- offsets
: HsaQueueEntry
- OFSchedPolicy
: Scheduler
- old_eq
: EventQueue::ScopedMigration
- oldBarrierCnt
: Wavefront
- oldDgpr
: Wavefront
- oldDgprId
: Wavefront
- oldDgprTcnt
: Wavefront
- oldestInFlightRobNum
: TraceCPU::ElasticDataGen::HardwareResource
- oldestInst
: InstructionQueue< Impl >::ListOrderEntry
- oldR11Val
: Trace::X86NativeTrace
- oldRcxVal
: Trace::X86NativeTrace
- oldRealR11Val
: Trace::X86NativeTrace
- oldRealRcxVal
: Trace::X86NativeTrace
- oldState
: Trace::ArmNativeTrace::ThreadState
- oldVgpr
: Wavefront
- oldVgprId
: Wavefront
- oldVgprTcnt
: Wavefront
- onData
: BasePrefetcher
- oneTraceComplete
: TraceCPU
- onInst
: BasePrefetcher
- onMiss
: BasePrefetcher
- onRead
: BasePrefetcher
- onWrite
: BasePrefetcher
- op
: MathExpr::Node
, MathExpr::OpSearch
, TimingExprBin
, TimingExprUn
, X86ISA::ExtMachInst
- op1
: ArmISA::BranchImmImmReg64
, ArmISA::BranchImmReg64
, ArmISA::BranchImmReg
, ArmISA::BranchReg64
, ArmISA::BranchReg
, ArmISA::BranchRegReg
, ArmISA::DataImmOp
, ArmISA::DataRegOp
, ArmISA::DataRegRegOp
, ArmISA::DataX1Reg2ImmOp
, ArmISA::DataX1RegImmOp
, ArmISA::DataX1RegOp
, ArmISA::DataX2RegImmOp
, ArmISA::DataX2RegOp
, ArmISA::DataX3RegOp
, ArmISA::DataXCondCompImmOp
, ArmISA::DataXCondCompRegOp
, ArmISA::DataXCondSelOp
, ArmISA::DataXERegOp
, ArmISA::DataXImmOp
, ArmISA::DataXSRegOp
, ArmISA::FpCondCompRegOp
, ArmISA::FpCondSelOp
, ArmISA::FpRegRegImmOp
, ArmISA::FpRegRegOp
, ArmISA::FpRegRegRegCondOp
, ArmISA::FpRegRegRegImmOp
, ArmISA::FpRegRegRegOp
, ArmISA::FpRegRegRegRegOp
, ArmISA::MicroNeonMixLaneOp64
, ArmISA::MicroNeonMixOp64
, ArmISA::MicroNeonMixOp
, ArmISA::Swap
, McrrOp
, MiscRegRegImmOp
, MrrcOp
, MsrRegOp
, RegImmRegOp
, RegImmRegShiftOp
, RegMiscRegImmOp
, RegRegImmImmOp64
, RegRegImmImmOp
, RegRegImmOp
, RegRegOp
, RegRegRegImmOp64
, RegRegRegImmOp
, RegRegRegOp
, RegRegRegRegOp
- op2
: ArmISA::BranchRegReg
, ArmISA::DataRegOp
, ArmISA::DataRegRegOp
, ArmISA::DataX2RegImmOp
, ArmISA::DataX2RegOp
, ArmISA::DataX3RegOp
, ArmISA::DataXCondCompRegOp
, ArmISA::DataXCondSelOp
, ArmISA::DataXERegOp
, ArmISA::DataXSRegOp
, ArmISA::FpCondCompRegOp
, ArmISA::FpCondSelOp
, ArmISA::FpRegRegRegCondOp
, ArmISA::FpRegRegRegImmOp
, ArmISA::FpRegRegRegOp
, ArmISA::FpRegRegRegRegOp
, McrrOp
, RegRegRegImmOp64
, RegRegRegImmOp
, RegRegRegOp
, RegRegRegRegOp
- op3
: ArmISA::DataX3RegOp
, ArmISA::FpRegRegRegRegOp
, RegRegRegRegOp
- opClass
: MinorOpClass
, OpDesc
- opClasses
: MinorFU
, MinorFUTiming
, MinorOpClassSet
- opcode
: Brig::BrigInstBase
, GPUStaticInst
, HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst >
, X86ISA::ExtMachInst
- opDescList
: FUDesc
- openboot
: SparcSystem
- openbootSymtab
: SparcSystem
- openFlagTable
: AlphaLinux
, ArmFreebsd32
, ArmFreebsd64
, ArmLinux32
, ArmLinux64
, MipsLinux
, PowerLinux
, RiscvLinux
, SparcLinux
, SparcSolaris
, X86Linux32
, X86Linux64
- openRow
: DRAMCtrl::Bank
- operands
: Brig::BrigDirectiveControl
, Brig::BrigDirectivePragma
, Brig::BrigInstBase
- opLat
: MinorFU
, OpDesc
- opLatencies
: FuncUnit
- ops
: MathExpr
- opsCommitted
: DefaultCommit< Impl >
- opSize
: X86ISA::ExtMachInst
, X86ISA::X86MicroopBase
- opSys
: ObjectFile
- order
: BaseCache
, MSHR::Target
, QueueEntry
, WriteQueueEntry::Target
- ORHostControllerEnable
: UFSHostDevice::HCIMem
- ORHostControllerStatus
: UFSHostDevice::HCIMem
- origAddr
: AddrMapper::AddrMapperSenderState
- originalRanges
: RangeAddrMapper
- origLength
: LTAGE::FoldedHistory
- origPC
: X86ISA::Decoder
- ORInterruptEnable
: UFSHostDevice::HCIMem
- ORInterruptStatus
: UFSHostDevice::HCIMem
- ORUECDL
: UFSHostDevice::HCIMem
- ORUECDME
: UFSHostDevice::HCIMem
- ORUECN
: UFSHostDevice::HCIMem
- ORUECPA
: UFSHostDevice::HCIMem
- ORUECT
: UFSHostDevice::HCIMem
- ORUTRIACR
: UFSHostDevice::HCIMem
- os
: Packet::PrintReqState
- ot
: OPTR
- out
: m5::stl_helpers::ContainerPrint< T >
, Minor::Decode
, Minor::Execute
, Minor::Fetch1
, Minor::Fetch2
- outArgCount
: Brig::BrigDirectiveExecutable
- outBuffer
: X86ISA::PS2Device
- outcome
: X86ISA::GpuTLB::TLBEvent
- outCreditLink
: NetworkInterface
- outCreditQueue
: NetworkInterface
- outerAttrs
: ArmISA::TlbEntry
- outerScopeMap
: StorageMap
- outerShareable
: ArmISA::TlbEntry
- outfile
: Terminal
- outFlitQueue
: NetworkInterface
- outNetLink
: NetworkInterface
- outNode_ptr
: NetworkInterface
- outOfBytes
: ArmISA::Decoder
, X86ISA::Decoder
- outOfOrderDataDelivery
: GlobalMemPipeline
- outpoint
: LTAGE::FoldedHistory
- output
: X86ISA::I8259
- output_high
: Intel8254Timer::Counter
- outputChar
: AlphaAccess
, MipsAccess
- outputFifo
: EtherSwitch::Interface
- outputFull
: X86ISA::I8042
- outputWidth
: Minor::Decode
, Minor::Fetch2
- outputWire
: Minor::Latch< Data >::Output
- outstanding
: LSQUnit< Impl >::LSQSenderState
, TimingSimpleCPU::SplitMainSenderState
, WholeTranslationState
- outstandingAddrs
: MemTest
- outstandingEvents
: DRAMCtrl::Rank
- outstandingReadReqs
: CommMonitor::MonitorStats
- outstandingReads
: DRAMSim2
, MemChecker::ByteTracker
- outstandingReadsHist
: CommMonitor::MonitorStats
- outstandingReqs
: Wavefront
, X86ISA::GpuTLB
- outstandingReqsRdGm
: Wavefront
- outstandingReqsRdLm
: Wavefront
- outstandingReqsWrGm
: Wavefront
- outstandingReqsWrLm
: Wavefront
- outstandingResponses
: Bridge::BridgeSlavePort
, SerialLink::SerialLinkSlavePort
- outstandingSnoop
: Cache
, CoherentXBar
- outstandingWriteReqs
: CommMonitor::MonitorStats
- outstandingWrites
: DRAMSim2
- outstandingWritesHist
: CommMonitor::MonitorStats
- OVAddr
: ArmISA::AbortFault< T >
- oVAddr
: ArmISA::Stage2MMU::Stage2Translation
- overallAccesses
: BaseCache
- overallAvgMissLatency
: BaseCache
- overallAvgMshrMissLatency
: BaseCache
- overallAvgMshrUncacheableLatency
: BaseCache
- overallHits
: BaseCache
- overallMisses
: BaseCache
- overallMissLatency
: BaseCache
- overallMissRate
: BaseCache
- overallMshrHits
: BaseCache
- overallMshrMisses
: BaseCache
- overallMshrMissLatency
: BaseCache
- overallMshrMissRate
: BaseCache
- overallMshrUncacheable
: BaseCache
- overallMshrUncacheableLatency
: BaseCache
- overflow
: Stats::DistData
, Stats::DistStor
- overflow64
: ArmISA::PMU::CounterState
- overrideEc
: ArmISA::HypervisorTrap
, ArmISA::SecureMonitorTrap
, ArmISA::SupervisorCall
, ArmISA::SupervisorTrap
, ArmISA::UndefinedInstruction
- owner
: ExternalMaster::Port
, ExternalSlave::Port
, Minor::LSQ::SplitDataRequest::TranslationEvent
, Port
, StubSlavePort::ResponseEvent
, Ticked::ClockEvent
, TraceCPU::DcachePort
, TraceCPU::ElasticDataGen
, TraceCPU::FixedRetryGen
, TraceCPU::IcachePort
- ownerLds
: LdsState::CuSidePort
Generated on Fri Jun 9 2017 13:04:45 for gem5 by doxygen 1.8.6