Here is a list of all class members with links to the classes they belong to:

- n -

• n : ArmISA::PMU
• N : ArmISA::TlbEntry
• n_cu : Shader
• n_master_ports : HMCController
• n_reg : GPUDynInst
• n_wf : Shader
• nack() : X86ISA::PS2Device
• name() : ActivityRecorder , AddrOperandBase , AlphaISA::AlignmentFault , AlphaISA::ArithmeticFault , AlphaISA::DtbAcvFault , AlphaISA::DtbAlignmentFault , AlphaISA::DtbFault , AlphaISA::DtbPageFault , AlphaISA::FloatEnableFault , AlphaISA::IntegerOverflowFault , AlphaISA::InterruptFault , AlphaISA::ItbAcvFault , AlphaISA::ItbFault , AlphaISA::ItbPageFault , AlphaISA::MachineCheckFault , AlphaISA::NDtbMissFault , AlphaISA::PalFault , AlphaISA::PDtbMissFault , AlphaISA::ProcessInfo , AlphaISA::RemoteGDB::AlphaGdbRegCache , AlphaISA::ResetFault , AlphaISA::UnimplementedOpcodeFault , ArchTimer , ArmISA::ArmFault::FaultVals , ArmISA::ArmFaultVals< T > , ArmISA::PMU::EventType , ArmISA::ProcessInfo , ArmISA::RemoteGDB::AArch32GdbRegCache , ArmISA::RemoteGDB::AArch64GdbRegCache , ArmISA::TableWalker::WalkerState , ArmKvmCPU::KvmCoreMiscRegInfo , ArmKvmCPU::KvmIntRegInfo , ArmV8KvmCPU::IntRegInfo , ArmV8KvmCPU::MiscRegInfo , BaseGen , BasePixelPump::PixelEvent , BaseRemoteGDB::BaseGdbRegCache , BaseRemoteGDB::HardBreakpoint , BaseRemoteGDB , BaseXBar::Layer< SrcType, DstType > , Brig::BrigDirectiveComment , Brig::BrigDirectiveExecutable , Brig::BrigDirectiveExtension , Brig::BrigDirectiveFbarrier , Brig::BrigDirectiveLabel , Brig::BrigDirectiveModule , Brig::BrigDirectiveVariable , Brig::BrigSectionHeader , CallbackQueue , ConditionRegisterState , CopyEngine::CopyEngineChannel , CpuLocalTimer::Timer , CxxConfigDirectoryEntry::ParamDesc , CxxConfigDirectoryEntry::PortDesc , CxxConfigManager::Exception , Debug::Flag , DefaultCommit< Impl > , DefaultDecode< Impl > , DefaultFetch< Impl > , DefaultIEW< Impl > , DefaultRename< Impl > , DistEtherLink::Link , DmaCallback , DRAMCtrl::Rank , ElasticTrace , EmbeddedPyBind , EtherInt , EtherLink::Link , EtherSwitch::Interface::PortFifo , Event , EventQueue , EventWrapper< T, F > , ExecStage , FaultBase , FetchStage , FuncUnit , GdbCommand , GDBListener , GenericAlignmentFault , GenericISA::M5DebugFault , GenericPageTableFault , GlobalMemPipeline , HsaCode , HsaObject , IGbE::DescCache< T > , InstructionQueue< Impl > , Intel8254Timer::Counter , Intel8254Timer , Kernel::Statistics , Label , LocalMemPipeline , LSQ< Impl > , LSQUnit< Impl > , MC146818 , MemDepUnit< MemDepPred, Impl >::MemDepEntry , MemDepUnit< MemDepPred, Impl > , MipsISA::MipsFault< T > , MipsISA::MipsFaultBase::FaultVals , MipsISA::ProcessInfo , MipsISA::RemoteGDB::MipsGdbRegCache , Named , OutputStream , P9MsgInfo , PacketQueue , PageTableBase , PAL , PCEvent , PciHost::DeviceInterface , PerfectSwitch , PhysicalMemory , Pl111 , Port , PowerISA::PowerFault , PowerISA::ProcessInfo , PowerISA::RemoteGDB::PowerGdbRegCache , ProbeListener , ProbePoint , ReExec , ReqPacketQueue , RespPacketQueue , RiscvISA::ProcessInfo , RiscvISA::RemoteGDB::RiscvGdbRegCache , RiscvISA::RiscvFault , ROB< Impl > , ScheduleStage , Scoreboard , ScoreboardCheckStage , SimObject , SimpleThread , SimpleTrace , Sinic::Regs::Info , SnoopRespPacketQueue , Sp804::Timer , SparcISA::RemoteGDB::SPARC64GdbRegCache , SparcISA::RemoteGDB::SPARCGdbRegCache , SparcISA::SparcFault< T > , SparcISA::SparcFaultBase::FaultVals , Stats::DataWrap< Derived, InfoProxyType > , Stats::DistPrint , Stats::Info , Stats::ScalarPrint , Stats::SparseHistPrint , Stats::VectorPrint , StorageElement , StridePrefetcher::PCTable , SyscallDesc , SyscallRetryFault , Throttle , TraceCPU::ElasticDataGen , TraceCPU::FixedRetryGen , UnifiedFreeList , UnimpFault , VecRegisterState , VirtIO9PBase::FSQueue , VirtIOBlock::RequestQueue , VirtIOConsole::TermRecvQueue , VirtIOConsole::TermTransQueue , VncServer::ServerInitMsg , X86ISA::ProcessInfo , X86ISA::RemoteGDB::AMD64GdbRegCache , X86ISA::RemoteGDB::X86GdbRegCache , X86ISA::UnimpInstFault , X86ISA::Walker::WalkerState , X86ISA::X86FaultBase
• name_off : AlphaISA::ProcessInfo , ArmISA::ProcessInfo , MipsISA::ProcessInfo , X86ISA::ProcessInfo
• name_offs : HsaKernelInfo
• Named() : Named
• namelen : VncServer::ServerInitMsg
• nameLength : Brig::BrigSectionHeader
• nameOut() : Serializable::ScopedCheckpointSection
• native_listener : Trace::NativeTrace
• NativeTrace() : Trace::NativeTrace
• NativeTraceRecord() : Trace::NativeTraceRecord
• nbrOfBanksDRAM : DramGen
• nbrOfBanksUtil : DramGen
• nbrOfRanks : DramGen
• nbrOutstanding() : DRAMSim2
• nbrOutstandingReads : DRAMSim2
• nbrOutstandingWrites : DRAMSim2
• ndRange : GpuDispatcher
• ndRangeMap : GpuDispatcher
• NDtbMissFault() : AlphaISA::NDtbMissFault
• need_stage() : InputUnit , VirtualChannel
• needCkpt : DistHeaderPkt::Header , DistIface::SyncNode
• needExit : DistHeaderPkt::Header , DistIface::SyncNode
• needMoreBytes() : AlphaISA::Decoder , ArmISA::Decoder , MipsISA::Decoder , PowerISA::Decoder , RiscvISA::Decoder , SparcISA::Decoder , X86ISA::Decoder
• needsResponse() : MemCmd
• NeedsResponse : MemCmd
• needsResponse() : Packet
• needsRetry() : SyscallReturn
• needsToBeSentToStoreBuffer() : Minor::LSQ::LSQRequest
• needStopSync : DistHeaderPkt::Header , DistIface::SyncNode
• needsToTick() : Minor::LSQ
• needsTSO : LSQUnit< Impl >
• needsWritable() : MemCmd
• NeedsWritable : MemCmd
• needsWritable() : MSHR , MSHR::TargetList , Packet
• needToSignalDrained : Minor::Pipeline
• needWarning() : SyscallDesc
• neitherReadNorWrite : DRAMCtrl
• net_dest : RouteInfo
• NetDest() : NetDest
• netmask() : Net::IpNetmask
• Network() : Network
• NetworkInterface() : NetworkInterface
• NetworkLink() : NetworkLink
• Never : SETranslatingPortProxy
• new_eq : EventQueue::ScopedMigration
• newInfoSet : AlphaISA::Interrupts
• newIpl : AlphaISA::Interrupts
• newKernelEnds : GPUCoalescer
• newPCState : CheckerCPU
• newPhysReg : DefaultRename< Impl >::RenameHistory
• newPredictionSeqNum : Minor::BranchData
• newRequests : GPUCoalescer
• newState : Trace::ArmNativeTrace::ThreadState
• newStreamSeqNum : Minor::BranchData
• newSummary : AlphaISA::Interrupts
• next() : ChunkGenerator , CopyEngineReg::DmaDesc , DependencyEntry< DynInstPtr > , FALRUBlk , VirtDescriptor , vring_desc
• nextAddr : ChunkGenerator , DmaReadFifo , LinearGen
• nextAddress() : TimerTable
• nextAt : DistIface::Sync
• nextBin : Event
• nextCycle() : Clocked
• nextDescAddr() : ArmISA::TableWalker::LongDescriptor
• nextElement : TraceGen
• nextExecute() : TraceCPU::FixedRetryGen
• nextGlbMemBus : ComputeUnit
• nextGlbRdBus() : ComputeUnit
• NextGlobalsOffset : SparcISA::ISA
• nextIdxs() : ArmISA::VfpMacroOp
• nextInBin : Event
• nextIndex : StackDistCalc
• nextInsertCycle : Minor::FUPipeline
• nextInstAddr() : BaseDynInst< Impl > , CheckerCPU , CheckerThreadContext< TC > , DefaultCommit< Impl > , FullO3CPU< Impl > , GenericISA::PCStateBase , GPUStaticInst , O3ThreadContext< class > , ProxyThreadContext< TC > , SimpleThread , ThreadContext
• nextIOState() : BaseKvmCPU::KVMCpuPort
• nextLineAddr : HDLcd::DmaEngine
• nextLocMemBus : ComputeUnit
• nextLocRdBus() : ComputeUnit
• nextMode : ArmISA::ArmFault::FaultVals , ArmISA::ArmFault , ArmISA::ArmFaultVals< T >
• nextModuleEntry : Brig::BrigDirectiveExecutable
• nextnlu() : AlphaISA::TLB , MipsISA::TLB , PowerISA::TLB , RiscvISA::TLB
• nextOffset : StorageSpace
• nextPacketTick() : BaseGen , IdleGen , LinearGen , RandomGen , TraceGen , TrafficGen
• NextPage : SETranslatingPortProxy
• nextPC : TimeBufStruct< Impl >::decodeComm
• nextPixel() : BasePixelPump , HDLcd::PixelPump
• nextPrefetchReadyTime() : BasePrefetcher , QueuedPrefetcher
• nextPrivilegeLevel : SparcISA::SparcFaultBase::FaultVals
• nextProgressMessage : MemTest
• nextQueueReadyTime() : Cache
• nextRead : TraceCPU::ElasticDataGen
• nextReadyTime() : Queue< Entry >
• nextRepeat : DistIface::Sync
• nextReqEvent : DRAMCtrl
• nextReqTime : DRAMCtrl
• nextSchedCu : Shader
• nextSeq() : X86ISA::TLB
• nextSeqCount : DramRotGen
• nextSerial : MemChecker
• nextStageReserve : Minor::Decode , Minor::Fetch1 , Minor::Fetch2
• nextState : CopyEngine::CopyEngineChannel , X86ISA::Walker::WalkerState
• nextTableAddr() : ArmISA::TableWalker::LongDescriptor
• nextTick() : EventQueue , LdsState::TickEvent
• nextTransitionTick : TrafficGen
• nextVCPUID : KvmVM
• nextWalk() : ArmISA::TableWalker
• NextWindowOffset : SparcISA::ISA
• nHistoryTables : LTAGE
• nIENBit : IdeDisk
• nInvalid : MathExpr
• nlink_t : RiscvLinux , Solaris
• nlu : AlphaISA::TLB , MipsISA::TLB , PowerISA::TLB , RiscvISA::TLB
• nmiVector : X86ISA::Interrupts
• nmrr : ArmISA::TLB
• NN_CONFIG_MASK : Pl390
• nnpc() : GenericISA::DelaySlotPCState< MachInst >
• NO_ACCESS : Request
• no_retry_on_stall : RubyPort::MemSlavePort
• NO_ROW : DRAMCtrl::Bank
• NoAccess : ArmISA::TlbEntry
• NoAddrRangeCoverage : Minor::LSQ
• NoArchPageTable() : NoArchPageTable
• NoBranch : Minor::BranchData
• NoCapableFU : FUPool
• NoCommand : X86ISA::I8042 , X86ISA::PS2Device
• noCostFUIndex : Minor::Execute
• Node() : MathExpr::Node , StackDistCalc::Node
• node : Stats::Temp , ThermalDomain , ThermalReference
• Node() : Trie< Key, Value >::Node
• node1 : ThermalCapacitor , ThermalResistor
• node2 : ThermalCapacitor , ThermalResistor
• nodeIndex : StackDistCalc::Node
• nodename : Linux::utsname , OperatingSystem::utsname , Solaris::utsname
• NodeRobNum : TraceCPU::ElasticDataGen
• nodes : TCPIface , ThermalModel
• NodeSeqNum : TraceCPU::ElasticDataGen
• nodesRemoved : DependencyGraph< DynInstPtr >
• nodesTraversed : DependencyGraph< DynInstPtr >
• nofault() : SparcISA::PageTableEntry
• NoFreeFU : FUPool
• NoGoodAddr : DefaultFetch< Impl >
• nomali : NoMaliGpu
• NoMaliGpu() : NoMaliGpu
• nomaliInfo : NoMaliGpu
• nonCacheable : ArmISA::TlbEntry
• NoncoherentXBar() : NoncoherentXBar
• NoncoherentXBarMasterPort() : NoncoherentXBar::NoncoherentXBarMasterPort
• NoncoherentXBarSlavePort() : NoncoherentXBar::NoncoherentXBarSlavePort
• NonCountingBloomFilter() : NonCountingBloomFilter
• none : cp::Format
• NONE : DefaultRename< Impl >
• none : DistHeaderPkt
• NONE : HsaCode
• noneSet() : Flags< T >
• NonMaskableInterrupt() : X86ISA::NonMaskableInterrupt
• nonSpecInstReady() : MemDepUnit< MemDepPred, Impl >
• nonSpecInsts : InstructionQueue< Impl >
• NonSpecMapIt : InstructionQueue< Impl >
• nonSpecSeqNum : TimeBufStruct< Impl >::commitComm
• noOutput() : Stats::Text
• noProgress() : TrafficGen
• noProgressEvent : TrafficGen
• noRequest() : MemTest
• noRequestEvent : MemTest
• noResponse() : MemTest
• noResponseCycles : GarnetSyntheticTraffic
• noResponseEvent : MemTest
• Normal : ArmISA::TlbEntry
• normalize() : CircleBuf< T >
• NormalPhase : VncServer
• NormalTran : ArmISA::TLB
• noSquashFromTC : O3ThreadState< class >
• noTargetMSHR : BaseCache
• NotDraining : Minor::Execute
• notIdleFraction : SimpleExecContext
• notify() : ArmISA::PMU::ProbeListener , BaseMemProbe::PacketListener , BasePrefetcher , PowerModel::ThermalProbeListener , ProbeListenerArg< T, Arg > , ProbeListenerArgBase< Arg > , ProbePointArg< T > , QueuedPrefetcher
• notifyFork() : BaseKvmCPU , CowDiskImage , Drainable , KvmVM , RawDiskImage
• notifyWgCompl() : GpuDispatcher
• NotIssued : Minor::Fetch1::FetchRequest , Minor::LSQ::LSQRequest
• NotPresent : PageTableBase
• notTakenCounters : BiModeBP
• notTakenPred : BiModeBP::BPHistory
• notTakenThreshold : BiModeBP
• noWB : LSQUnit< Impl >::LSQSenderState
• npc() : GenericISA::SimplePCState< MachInst > , SparcISA::RemoteGDB::SPARC64GdbRegCache , SparcISA::RemoteGDB::SPARCGdbRegCache
• nphalt : PAL
• NPIE : VGic
• nres_error_head : SparcISA::ISA
• nres_error_tail : SparcISA::ISA
• ns : ArmISA::TlbEntry
• nsec() : Time
• NSEC_PER_MSEC : Time
• NSEC_PER_SEC : Time
• NSEC_PER_USEC : Time
• NSGigE() : NSGigE
• NSGigEInt() : NSGigEInt
• nsh : ArmISA::PMU
• nsk : ArmISA::PMU
• nState : Trace::ArmNativeTrace , Trace::X86NativeTrace
• nstid : ArmISA::TlbEntry
• nsu : ArmISA::PMU
• Nucleus : SparcISA::TLB
• null() : AtagHeader , AtagNone
• nullCallback() : IGbE::TxDescCache
• nullEvent : IGbE::TxDescCache
• nullStaticInstPtr : StaticInst
• num : Intel8254Timer::Counter , KvmVM::MemSlot , MachineID , vring
• num_args : HsaQueueEntry
• NUM_BLOCKED_CAUSES : BaseCache
• NUM_COMMAND_ATTRIBUTES : MemCmd
• num_dest_operands : HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >
• num_encodings : VncInput::PixelEncodingsMessage
• NUM_FDS : FDArray
• num_fds : PollQueue
• num_kernelLaunched : GpuDispatcher
• num_kernels : HsaDriverSizes
• num_lanes : SerialLink
• NUM_LOG_LEVELS : Logger
• NUM_LR : VGic
• NUM_MEM_CMDS : MemCmd
• NUM_MMAP_FLAGS : AlphaLinux , ArmLinux32 , ArmLinux64 , MipsLinux , PowerLinux , RiscvLinux , SparcLinux , SparcSolaris , X86Linux32 , X86Linux64
• NUM_OF_PERF_LEVELS : EnergyCtrl
• NUM_OPEN_FLAGS : AlphaLinux , ArmFreebsd32 , ArmFreebsd64 , ArmLinux32 , ArmLinux64 , MipsLinux , PowerLinux , RiscvLinux , SparcLinux , SparcSolaris , X86Linux32 , X86Linux64
• num_rects : VncServer::FrameBufferUpdate
• NUM_ROOT_PROCS : MipsLinux
• num_src_operands : HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >
• Num_StageId : Minor::Pipeline
• Num_Syscall32_Descs : SparcISA::SparcLinuxProcess
• Num_Syscall_Descs : AlphaISA::AlphaLinuxProcess , MipsLinuxProcess , PowerLinuxProcess , SparcISA::SparcLinuxProcess , SparcISA::SparcSolarisProcess
• numAccessesInDTLB : Minor::LSQ
• numAccessesInMemorySystem : Minor::LSQ
• numAccessesIssuedToMemory : Minor::LSQ
• numActiveThreads() : FullO3CPU< Impl >
• numAllocatedStreams : Prefetcher
• numALUInstsExecuted : ComputeUnit
• numBanksActive : DRAMCtrl::Rank
• number : Arguments , BaseRemoteGDB , EtherLink::Link , FUDesc , PacketFifoEntry , Terminal , VncServer , X86ISA::IntSinkPin
• number_of_fault_types : FaultModel
• numBlocks : BaseTags
• numBranches : SimpleExecContext
• numBranchMispred : SimpleExecContext
• numBusyCycles : SimpleExecContext
• numBytes : ArmISA::Stage2MMU::Stage2Translation , DmaPort::DmaReqState
• numCaches : FALRU
• numCallsReturns : SimpleExecContext
• numCASOps : ComputeUnit
• numCCDestRegs() : BaseDynInst< Impl > , StaticInst
• numCCPhysRegs() : PhysRegFile
• numCCRegReads : SimpleExecContext
• numCCRegWrites : SimpleExecContext
• numCkptReq : DistIface::SyncSwitch
• numCoalescedMMIO : BaseKvmCPU
• NumCodes : PAL
• numCommittedDist : DefaultCommit< Impl >
• numCondCtrlInsts : SimpleExecContext
• numContexts() : System
• numCPUs : AlphaAccess , MipsAccess
• numCycles : Ticked
• numCyclesLocal : Ticked
• numCyclesPerLoadTransfer : ComputeUnit
• numCyclesPerStoreTransfer : ComputeUnit
• numCyclesWithInstrIssued : ExecStage
• numCyclesWithInstrTypeIssued : ExecStage
• numCyclesWithNoInstrTypeIssued : ExecStage
• numCyclesWithNoIssue : ExecStage
• numDataArrayReads : CacheMemory
• numDataArrayStalls : CacheMemory
• numDataArrayWrites : CacheMemory
• numDepts : ElasticTrace::TraceInfo
• numDestinations : GarnetSyntheticTraffic
• numDestRegs() : BaseDynInst< Impl > , StaticInst
• NumDeviceIds : Iob
• numDiscardedOps : Minor::MinorStats
• numDispLeft : HsaQueueEntry , NDRange
• numDomains() : DVFSHandler
• numDroppedPrefetches : Prefetcher
• numDstRegOperands() : GPUDynInst , GPUStaticInst , HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst > , HsailISA::BrDirectInst , HsailISA::BrIndirectInst , HsailISA::BrnDirectInst , HsailISA::BrnIndirectInst , HsailISA::Call , HsailISA::CbrDirectInst , HsailISA::CbrIndirectInst , HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands > , HsailISA::LdaInstBase< DestOperandType, AddrOperandType > , HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType > , HsailISA::SpecialInst1SrcBase< DestOperandType > , HsailISA::SpecialInstNoSrcBase< DestOperandType > , HsailISA::SpecialInstNoSrcNoDest , HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType > , HsailISA::Stub , HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType > , HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType > , KernelLaunchStaticInst
• numEntries : DefaultBTB , DependencyGraph< DynInstPtr > , InstructionQueue< Impl > , Queue< Entry > , ReturnAddrStack , ROB< Impl >
• numExitReq : DistIface::SyncSwitch
• numExitSignal : BaseKvmCPU
• numFailedCASOps : ComputeUnit
• NumFaultSources : ArmISA::ArmFault
• numFetchesInITLB : Minor::Fetch1
• numFetchesInMemorySystem : Minor::Fetch1
• numFetchingThreads : DefaultFetch< Impl >
• numFetchSuspends : Minor::MinorStats
• numFilteredNodes : ElasticTrace
• numFloatPhysRegs() : PhysRegFile
• numFpAluAccesses : SimpleExecContext
• numFPDestRegs() : BaseDynInst< Impl > , StaticInst
• numFpInsts : SimpleExecContext
• numFpRegReads : SimpleExecContext
• numFpRegWrites : SimpleExecContext
• numFragments : Minor::LSQ::SplitDataRequest
• numFreeCCRegs() : UnifiedFreeList
• numFreeEntries() : InstructionQueue< Impl > , LSQ< Impl > , ROB< Impl > , SimpleRenameMap , UnifiedRenameMap
• numFreeFloatRegs() : UnifiedFreeList
• numFreeIntRegs() : UnifiedFreeList
• numFreeLoadEntries() : LSQ< Impl > , LSQUnit< Impl >
• numFreeRegs() : SimpleFreeList
• numFreeStoreEntries() : LSQ< Impl > , LSQUnit< Impl >
• numFU : FUPool
• numFuncUnits : Minor::Execute
• numGlbMemUnits : ComputeUnit
• NumGlobalRegs : SparcISA::ISA
• numHalt : BaseKvmCPU
• numHits : Prefetcher
• numHypercalls : BaseKvmCPU
• numIdleCycles : SimpleExecContext
• numIncomplete : MemChecker::WriteCluster
• numInFlightFetches() : Minor::Fetch1
• numInFlightLoads : TraceCPU::ElasticDataGen::HardwareResource
• numInFlightStores : TraceCPU::ElasticDataGen::HardwareResource
• numInService() : Queue< Entry >
• numInst : CheckerCPU , DefaultFetch< Impl > , SimpleExecContext , ThreadState
• numInstrExecuted : ComputeUnit
• numInsts : BaseKvmCPU , HsaCode , Minor::ForwardInstData , Minor::MinorStats , SimpleExecContext , ThreadState
• numInstsInROB : ROB< Impl >
• numIntAluAccesses : SimpleExecContext
• numIntDestRegs() : BaseDynInst< Impl > , StaticInst
• numInterrupts : BaseKvmCPU
• numIntInsts : SimpleExecContext
• numIntPhysRegs() : PhysRegFile
• numInTranslationFragments : Minor::LSQ::SplitDataRequest
• numIntRegReads : SimpleExecContext
• numIntRegWrites : SimpleExecContext
• numIO : BaseKvmCPU
• numIssuedDist : InstructionQueue< Impl >
• numIssuedFragments : Minor::LSQ::SplitDataRequest
• numIssueOrderDepLoads : ElasticTrace
• numIssueOrderDepOther : ElasticTrace
• numIssueOrderDepStores : ElasticTrace
• numItems() : X86ISA::MediaOpBase
• numIter : LTAGE::LoopEntry
• numKernels() : BrigObject , HsaObject
• numLeft : Barrier
• numLevels : MultiLevelPageTable< ISAOps >
• NumLevels : SparcISA::SparcFaultBase
• numLines : HDLcd::DmaEngine
• NumLines : X86ISA::I8259
• numLoad : CheckerCPU , SimpleExecContext , ThreadState
• numLoadInsts : SimpleExecContext
• numLoads() : LSQ< Impl > , LSQUnit< Impl >
• numLocMemUnits : ComputeUnit
• numMemRefs : SimpleExecContext , ThreadState
• numMemUnits : ExecStage , ScheduleStage , ScoreboardCheckStage
• numMicroops : ArmISA::Memory64 , ArmISA::Memory , ArmISA::PredMacroOp , ArmISA::RfeOp , ArmISA::SrsOp , X86ISA::MacroopBase , X86ISAInst::MicrocodeRom
• numMissedPrefetchedBlocks : Prefetcher
• numMissObserved : Prefetcher
• numMMIO : BaseKvmCPU
• numNodes : DistIface::SyncSwitch
• numOp : SimpleExecContext , ThreadState
• numOps : Minor::MinorStats , SimpleExecContext , ThreadState , TraceCPU
• numOrderDepStores : ElasticTrace
• numOther : AbstractMemory
• numPackets : TrafficGen
• numPacketsMax : GarnetSyntheticTraffic
• numPacketsSent : GarnetSyntheticTraffic
• numPagesCrossed : Prefetcher
• numPartialHits : Prefetcher
• numPerfLevels() : DVFSHandler , SrcClockDomain
• numPhysRegs : InstructionQueue< Impl > , Scoreboard
• numPlanes : FlashDevice
• numPredictedBranches : SimpleExecContext
• numPrefetchAccepted : Prefetcher
• numPrefetchRequested : Prefetcher
• numPwrStateTransitions : ClockedObject
• numRdRetry : DRAMCtrl
• numReads : AbstractMemory , MemTest
• numReadsStat : MemTest
• numRegDep : ElasticTrace , TraceCPU::ElasticDataGen::GraphNode
• numRegs : ArmISA::MicroNeonMixOp64 , ArmISA::VldMultOp64 , ArmISA::VstMultOp64 , ConditionRegisterState , Minor::Scoreboard , VectorRegisterFile , X86ISA::Cmos
• numRegsPerSimd : VectorRegisterFile
• numReserve : Queue< Entry >
• numReservedSlots : Minor::Queue< ElemType, ReportTraits, BubbleTraits >
• numResults : Minor::Scoreboard
• numRetiredFragments : Minor::LSQ::SplitDataRequest
• numRetries : TrafficGen
• numRetrySucceeded : TraceCPU::ElasticDataGen , TraceCPU::FixedRetryGen
• numRobDep : TraceCPU::ElasticDataGen::GraphNode
• numROBFreeEntries() : DefaultCommit< Impl >
• numRobs : DefaultCommit< Impl >
• numRunningContexts() : System
• numSchedDcacheEvent : TraceCPU
• numSchedIcacheEvent : TraceCPU
• NumSectionIndices : BrigObject
• numSendAttempted : TraceCPU::ElasticDataGen , TraceCPU::FixedRetryGen
• numSendFailed : TraceCPU::ElasticDataGen , TraceCPU::FixedRetryGen
• numSendSucceeded : TraceCPU::ElasticDataGen , TraceCPU::FixedRetryGen
• numSeqPkts : DramGen
• numSets : BaseSetAssoc , IndirectPredictor , X86ISA::GpuTLB
• numShrMemPipes : ScoreboardCheckStage
• numSIMDs : ComputeUnit , ExecStage , FetchStage , ScheduleStage , ScoreboardCheckStage
• numSimulatedInsts() : BaseCPU
• numSimulatedOps() : BaseCPU
• numSlots : Minor::LSQ::StoreBuffer
• numSOLoads : TraceCPU::ElasticDataGen
• numSOStores : TraceCPU::ElasticDataGen
• numSplitReqs : TraceCPU::ElasticDataGen
• numSquashable : ArmISA::TableWalker , X86ISA::Walker
• numSrcRegOperands() : GPUDynInst , GPUStaticInst , HsailISA::AtomicInstBase< OperandType, AddrOperandType, NumSrcOperands, HasDst > , HsailISA::BrDirectInst , HsailISA::BrIndirectInst , HsailISA::BrnDirectInst , HsailISA::BrnIndirectInst , HsailISA::Call , HsailISA::CbrDirectInst , HsailISA::CbrIndirectInst , HsailISA::CommonInstBase< DestOperandType, SrcOperandType, NumSrcOperands > , HsailISA::LdaInstBase< DestOperandType, AddrOperandType > , HsailISA::LdInstBase< MemOperandType, DestOperandType, AddrOperandType > , HsailISA::SpecialInst1SrcBase< DestOperandType > , HsailISA::SpecialInstNoSrcBase< DestOperandType > , HsailISA::SpecialInstNoSrcNoDest , HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType > , HsailISA::Stub , HsailISA::ThreeNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType, Src2OperandType > , HsailISA::TwoNonUniformSourceInstBase< DestOperandType, Src0OperandType, Src1OperandType > , KernelLaunchStaticInst
• numSrcRegs() : BaseDynInst< Impl > , StaticInst
• numStages : ActivityRecorder
• NumStages : FullO3CPU< Impl >
• numStages : WaitClass
• NumStatus : BaseDynInst< Impl >
• numStopSyncReq : DistIface::SyncSwitch
• numStoreInsts : SimpleExecContext
• numStores() : LSQ< Impl > , LSQUnit< Impl >
• numStoresInTransfers : Minor::LSQ
• numStoresToWB() : LSQ< Impl > , LSQUnit< Impl >
• numStructElems : ArmISA::MicroNeonMixLaneOp64 , ArmISA::MicroNeonMixOp64 , ArmISA::VldMultOp64 , ArmISA::VldSingleOp64 , ArmISA::VstMultOp64 , ArmISA::VstSingleOp64
• numSuppressed : TrafficGen
• numSwitches() : Topology
• numSyscallDescs : X86ISA::X86Process
• numSyscalls : Process
• numSystemsRunning : System
• numTagArrayReads : CacheMemory
• numTagArrayStalls : CacheMemory
• numTagArrayWrites : CacheMemory
• numTarget : BaseCache
• numThreads : BPredUnit , DefaultCommit< Impl > , DefaultDecode< Impl > , DefaultFetch< Impl > , DefaultIEW< Impl > , DefaultRename< Impl > , InstructionQueue< Impl > , LSQ< Impl > , MipsISA::ISA , ROB< Impl >
• numTimesBlockedDueRAWDependencies : Wavefront
• numTimesBlockedDueVrfPortAvail : Wavefront
• numTimesBlockedDueWAXDependencies : Wavefront
• numTimesWgBlockedDueVgprAlloc : ComputeUnit
• numTotalRegs : Scoreboard
• numTraceCPUs : TraceCPU
• numTransActiveIdle : ExecStage
• numTranslatedFragments : Minor::LSQ::SplitDataRequest
• numUniquePages : X86ISA::GpuTLB
• numUnissuedAccesses : Minor::LSQ::StoreBuffer
• numUnissuedStores() : Minor::LSQ::StoreBuffer
• numUnpredictableResults : Minor::Scoreboard
• numVecOpsExecuted : ComputeUnit
• numVecRegsPerSimd : ComputeUnit
• numVMExits : BaseKvmCPU
• numVMHalfEntries : BaseKvmCPU
• numVnicDistance : Sinic::Device
• numVoltages() : VoltageDomain
• numVpes : MipsISA::ISA
• numWaiting : Barrier
• numWays : IndirectPredictor
• numWg : NDRange
• numWgCompleted : NDRange
• numWgTotal : NDRange
• NumWindowedRegs : SparcISA::ISA
• numWorkIds : System
• numWrites : AbstractMemory , MemTest
• numWritesStat : MemTest
• numWrRetry : DRAMCtrl
• nupc() : GenericISA::DelaySlotUPCState< MachInst > , GenericISA::UPCState< MachInst >
• NvFlags : RealViewCtrl
• NvFlagsClr : RealViewCtrl
• nvram : SparcSystem
• nvramSymtab : SparcSystem
• nxt() : Net::Ip6Hdr , Net::Ip6Opt
• nxtAvail : WaitClass
• nxtBusy : VectorRegisterFile