- s -
- samePage()
: BasePrefetcher
- sample()
: FunctionProfile
, Stats::AvgSampleStor
, Stats::DistBase< Derived, Stor >
, Stats::DistProxy< Stat >
, Stats::DistStor
, Stats::HistStor
, Stats::SampleStor
, Stats::SparseHistBase< Derived, Stor >
, Stats::SparseHistStor
- samplePeriod()
: PerfKvmCounterConfig
- samplePeriodic()
: CommMonitor
- SampleStor()
: Stats::SampleStor
- sanitiseVoltages()
: VoltageDomain
- sanityCheckTree()
: StackDistCalc
- SatCounter()
: SatCounter
- satid()
: Net::IpOpt
- satInt()
: ArmISA::ArmStaticInst
- satisfyRequest()
: Cache
- saturateOp()
: ArmISA::ArmStaticInst
- save()
: CowDiskImage
- saveInst()
: HsailISA::Decoder
- scalar()
: Stats::ValueBase< Derived >
- ScalarBase()
: Stats::ScalarBase< Derived, Stor >
- ScalarInfoProxy()
: Stats::ScalarInfoProxy< Stat >
- scalarOp()
: X86ISA::MediaOpBase
- ScalarProxy()
: Stats::ScalarProxy< Stat >
- ScalarProxyNode()
: Stats::ScalarProxyNode< Stat >
- ScalarStatNode()
: Stats::ScalarStatNode
- schedDcacheNext()
: TraceCPU
- schedDcacheNextEvent()
: TraceCPU
- schedIcacheNext()
: TraceCPU
- schedMemSideSendEvent()
: BaseCache
- schedSendEvent()
: BaseCache::CacheMasterPort
, PacketQueue
- schedSendTiming()
: PacketQueue
- schedTimingReq()
: Bridge::BridgeMasterPort
, QueuedMasterPort
, SerialLink::SerialLinkMasterPort
- schedTimingResp()
: Bridge::BridgeSlavePort
, QueuedSlavePort
, SerialLink::SerialLinkSlavePort
- schedTimingSnoopResp()
: QueuedMasterPort
- schedule()
: BaseGlobalEvent
, EventManager
, EventQueue
, LdsState::TickEvent
, PCEventQueue
, PollQueue
, TimingSimpleCPU::TimingCPUPort::TickEvent
- schedule_wakeup()
: Router
- ScheduleAdd()
: Shader
- scheduleCP0Update()
: MipsISA::ISA
- scheduled()
: BaseGlobalEvent
, Event
- scheduleDispatch()
: GpuDispatcher
- scheduleEvent()
: Consumer
, MipsISA::ISA::CP0Event
- scheduleEventAbsolute()
: Consumer
- scheduleInstCommitEvent()
: BaseRemoteGDB
- scheduleIntr()
: MC146818::RTCEvent
, Uart8250::IntrEvent
- scheduleNonSpec()
: InstructionQueue< Impl >
- scheduleOutputLink()
: NetworkInterface
- schedulePowerEvent()
: DRAMCtrl::Rank
- Scheduler()
: Scheduler
- scheduleReadyInsts()
: InstructionQueue< Impl >
- ScheduleStage()
: ScheduleStage
- scheduleTickEvent()
: FullO3CPU< Impl >
- scheduleWakeUpEvent()
: DRAMCtrl::Rank
- ScopedCheckpointSection()
: Serializable::ScopedCheckpointSection
- ScopedMigration()
: EventQueue::ScopedMigration
- ScopedRelease()
: EventQueue::ScopedRelease
- Scoreboard()
: Minor::Scoreboard
, Scoreboard
- ScoreboardCheckStage()
: ScoreboardCheckStage
- SCSICMDHandle()
: UFSHostDevice::UFSSCSIDevice
- SCSIResume()
: UFSHostDevice
- SCSIStart()
: UFSHostDevice
- sdb()
: Net::IpOpt
- sec()
: Net::IpOpt
, Time
- Section()
: IniFile::Section
- sectionExists()
: CheckpointIn
, ElfObject
, IniFile
- secure()
: ArmISA::TableWalker::DescriptorBase
, ArmISA::TableWalker::L1Descriptor
, ArmISA::TableWalker::L2Descriptor
, ArmISA::TableWalker::LongDescriptor
- SecureMonitorCall()
: ArmISA::SecureMonitorCall
- SecureMonitorTrap()
: ArmISA::SecureMonitorTrap
- secureTable()
: ArmISA::TableWalker::LongDescriptor
- SecurityException()
: X86ISA::SecurityException
- SegmentNotPresent()
: X86ISA::SegmentNotPresent
- select_free_vc()
: OutputUnit
- self()
: Stats::DataWrap< Derived, InfoProxyType >
- SelfStallingPipeline()
: Minor::SelfStallingPipeline< ElemType, ReportTraits, BubbleTraits >
- send()
: ArchTimer::Interrupt
, BaseRemoteGDB
, EtherBus
, TraceCPU::FixedRetryGen
- send_allowed()
: SwitchAllocator
- sendAtomic()
: MasterPort
- sendAtomicSnoop()
: SlavePort
- sendCmd()
: DistIface
, TCPIface
- sendCredit()
: NetworkInterface
- sendData()
: TimingSimpleCPU
- sendDeferredPacket()
: Cache::CacheReqPacketQueue
, PacketQueue
- sendDma()
: DmaPort
- sendDone()
: DistEtherLink::LocalIface
, EtherInt
, EtherLink::Interface
, EtherSwitch::Interface
, EtherTapInt
, IGbEInt
, NSGigEInt
, Sinic::Interface
- sendError()
: VncServer
- SenderState()
: AbstractController::SenderState
, ComputeUnit::DataPort::SenderState
, ComputeUnit::DTLBPort::SenderState
, ComputeUnit::ITLBPort::SenderState
, ComputeUnit::LDSPort::SenderState
, ComputeUnit::SQCPort::SenderState
, Packet::SenderState
, RubyPort::SenderState
, RubyTester::SenderState
- sendFetch()
: TimingSimpleCPU
- sendFrameBufferResized()
: VncServer
- sendFrameBufferUpdate()
: VncServer
- sendFunctional()
: MasterPort
- sendFunctionalSnoop()
: SlavePort
- sendInt()
: BaseGic
, MuxingKvmGic
, Pl390
- sendMessage()
: X86ISA::IntDevice::IntMasterPort
- sendMSHRQueuePacket()
: Cache
- sendNextFragmentToTranslation()
: Minor::LSQ::SplitDataRequest
- sendPacket()
: DistIface
, EtherInt
, MSHR
, QueueEntry
, TCPIface
, WriteQueueEntry
- sendPackets()
: X86ISA::Walker::WalkerState
- sendPkt()
: GarnetSyntheticTraffic
, MemTest
- sendPPInt()
: BaseGic
, MuxingKvmGic
, Pl390
- sendRangeChange()
: SlavePort
- sendReal()
: EtherTapBase
, EtherTapStub
- sendRequest()
: ComputeUnit
- sendResponse()
: DRAMSim2
- sendRetry()
: BaseXBar::Layer< SrcType, DstType >
, BaseXBar::ReqLayer
, BaseXBar::RespLayer
, BaseXBar::SnoopRespLayer
- sendRetryReq()
: SlavePort
- sendRetryResp()
: CoherentXBar::SnoopRespPort
, MasterPort
- sendRetrySnoopResp()
: SlavePort
- sendRMsg()
: VirtIO9PBase
- sendServerInit()
: VncServer
- sendSimulated()
: EtherTapBase
- sendSplitData()
: TimingSimpleCPU
- sendStore()
: LSQUnit< Impl >
- sendStoreToStoreBuffer()
: Minor::LSQ
- sendSyncRequest()
: ComputeUnit
- sendTCP()
: TCPIface
- sendTiming()
: PacketQueue
, ReqPacketQueue
, RespPacketQueue
, SnoopRespPacketQueue
, X86ISA::Walker
- sendTimingReq()
: ComputeUnit::LDSPort
, MasterPort
- sendTimingResp()
: SlavePort
- sendTimingSnoopReq()
: SlavePort
- sendTimingSnoopResp()
: MasterPort
- sendToLds()
: ComputeUnit
- sendWriteQueuePacket()
: Cache
- sentAllPackets()
: Minor::LSQ::LSQRequest
, Minor::LSQ::SingleDataRequest
, Minor::LSQ::SpecialDataRequest
, Minor::LSQ::SplitDataRequest
- seq()
: Net::TcpHdr
- seqNum()
: GPUDynInst
- Sequencer()
: Sequencer
- SequencerRequest()
: SequencerRequest
- SequencerWakeupEvent()
: Sequencer::SequencerWakeupEvent
- Serializable()
: Serializable
- serialize()
: AlphaBackdoor::Access
, AlphaBackdoor
, AlphaISA::Interrupts
, AlphaISA::ISA
, AlphaISA::Kernel::Statistics
, AlphaISA::TLB
, AlphaISA::TlbEntry
, ArchTimer
, ArmISA::Interrupts
, ArmISA::ISA
, ArmISA::PMU::CounterState
, ArmISA::PMU
, ArmISA::PTE
, ArmISA::TLB
, ArmISA::TlbEntry
, BasePixelPump::PixelEvent
, BasePixelPump
, Cache
, CheckerCPU
, ClockedObject
, CopyEngine::CopyEngineChannel
, CopyEngine
, CopyEngineReg::ChanRegs
, CopyEngineReg::Reg< T >
, CopyEngineReg::Regs
, CowDiskImage
, CpuLocalTimer
, CpuLocalTimer::Timer
, CxxConfigManager
, DeviceFDEntry
, DisplayTimings
, DistEtherLink::Link
, DistEtherLink
, DistIface::RecvScheduler::Desc
, DistIface::RecvScheduler
, DistIface
, DistIface::Sync
, DistIface::SyncNode
, DistIface::SyncSwitch
, DmaReadFifo
, DumbTOD
, DVFSHandler
, EnergyCtrl
, EtherLink::Link
, EtherLink
, EtherSwitch::Interface::PortFifo
, EtherSwitch::Interface::PortFifoEntry
, EtherSwitch::Interface
, EtherSwitch
, EtherTapBase
, EtherTapStub
, EthPacketData
, Event
, FDEntry
, FileFDEntry
, FlashDevice
, FrameBuffer
, FuncPageTable
, GenericISA::DelaySlotPCState< MachInst >
, GenericISA::DelaySlotUPCState< MachInst >
, GenericISA::PCStateBase
, GenericISA::UPCState< MachInst >
, GenericTimer
, GenericTimerMem
, Globals
, GpuDispatcher
, HDLcd::DmaEngine
, HDLcd
, I2CBus
, IdeController
, IdeDisk
, IGbE::DescCache< T >
, IGbE::RxDescCache
, IGbE
, IGbE::TxDescCache
, iGbReg::Regs::Reg< T >
, iGbReg::Regs
, Intel8254Timer::Counter
, Intel8254Timer
, Iob
, Kernel::Statistics
, LocalSimLoopExitEvent
, Malta
, MaltaCChip
, MaltaIO
, MC146818
, MinorCPU
, MipsISA::Interrupts
, MipsISA::PTE
, MipsISA::TLB
, MipsISA::TlbEntry
, MmDisk
, MultiLevelPageTable< ISAOps >
, MuxingKvmGic
, NoMaliGpu
, NSGigE
, O3ThreadState< class >
, PacketFifo
, PacketFifoEntry
, PciDevice
, PhysicalMemory
, PipeFDEntry
, Pl011
, PL031
, Pl050
, Pl111
, Pl390::BankedRegs
, Pl390
, PollEvent
, PowerISA::PTE
, PowerISA::TLB
, PowerISA::TlbEntry
, Process
, Random
, RealViewCtrl
, RealViewOsc
, RiscvISA::PTE
, RiscvISA::TLB
, RiscvISA::TlbEntry
, Root
, RubySystem
, Serializable
, SimObject
, SimpleThread
, Sinic::Base
, Sinic::Device
, Sp804
, Sp804::Timer
, SparcISA::Interrupts
, SparcISA::ISA
, SparcISA::TLB
, SparcISA::TlbEntry
, SrcClockDomain
, SymbolTable
, System
, SystemCounter
, ThermalCapacitor
, ThermalDomain
, ThermalModel
, ThermalReference
, ThermalResistor
, ThreadState
, Ticked
, TickedObject
, Time
, TrafficGen
, Tsunami
, TsunamiCChip
, TsunamiIO
, TsunamiPChip
, Uart8250
, UFSHostDevice
, VGic
, VirtIO9PProxy
, VirtIODeviceBase
, VirtQueue
, VoltageDomain
, X86ISA::Cmos
, X86ISA::GpuTLB
, X86ISA::I8042
, X86ISA::I82094AA
, X86ISA::I8237
, X86ISA::I8254
, X86ISA::I8259
, X86ISA::Interrupts
, X86ISA::ISA
, X86ISA::PCState
, X86ISA::PS2Device
, X86ISA::PS2Mouse
, X86ISA::Speaker
, X86ISA::TLB
- serializeAfter()
: DefaultRename< Impl >
- serializeAll()
: Serializable
, SimObject
- serializeSection()
: Serializable
- serializeStore()
: PhysicalMemory
- serializeSymtab()
: AlphaSystem
, SparcSystem
, System
- serializeThread()
: BaseKvmCPU
, BaseSimpleCPU
, FullO3CPU< Impl >
, MinorCPU
- SerialLink()
: SerialLink
- SerialLinkMasterPort()
: SerialLink::SerialLinkMasterPort
- SerialLinkSlavePort()
: SerialLink::SerialLinkSlavePort
- SeriesRequestGenerator()
: SeriesRequestGenerator
- serverDataReady()
: VirtIO9PProxy
- service()
: PCEventQueue
, PollQueue
- serviceEvents()
: EventQueue
- serviceOne()
: EventQueue
- set()
: AbstractBloomFilter
, BaseDynInst< Impl >::Result
, BlockBloomFilter
, BulkBloomFilter
, CheckerCPU::Result
, CRegOperand
, DRegOperand
, Flags< T >
, GenericISA::DelaySlotPCState< MachInst >
, GenericISA::DelaySlotUPCState< MachInst >
, GenericISA::PCStateBase
, GenericISA::SimplePCState< MachInst >
, GenericISA::UPCState< MachInst >
, H3BloomFilter
, ListOperand
, LSB_CountingBloomFilter
, MultiBitSelBloomFilter
, MultiGrainBloomFilter
, Net::Ip6Ptr
, Net::IpPtr
, Net::TcpPtr
, Net::UdpPtr
, NonCountingBloomFilter
, Packet
, RefCountingPtr< T >
- Set()
: Set
- set()
: SRegOperand
, Stats::AvgStor
, Stats::StatStor
, Time
, TimeBuffer< T >::wire
, TimerTable
, WaitClass
, X86ISA::PCState
- set_active()
: VirtualChannel
- set_credit_link()
: InputUnit
, OutputUnit
- set_dequeue_time()
: flit
- set_enqueue_time()
: VirtualChannel
- set_idle()
: VirtualChannel
- set_in_link()
: InputUnit
- set_out_link()
: OutputUnit
- set_outport()
: flit
, VirtualChannel
- set_outvc()
: VirtualChannel
- set_route()
: flit
- set_src_delay()
: flit
- set_state()
: VirtualChannel
- set_time()
: flit
- set_vc()
: flit
- set_vc_active()
: InputUnit
- set_vc_idle()
: InputUnit
- set_vc_state()
: OutputUnit
- setAccessLatency()
: Request
- setActiveThreads()
: DefaultCommit< Impl >
, DefaultDecode< Impl >
, DefaultFetch< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
, InstructionQueue< Impl >
, LSQ< Impl >
, ROB< Impl >
- setActivityCount()
: ActivityRecorder
- setAddr()
: Packet
- setAddress()
: AccessTraceForAddress
, SubBlock
, VirtQueue
, VirtQueue::VirtRing< T >
- setAf()
: ArmISA::TableWalker::LongDescriptor
- setAIWNextPC()
: ArmISA::ArmStaticInst
- setAllInstructions()
: AddressProfiler
- setAlphaAccess()
: AlphaSystem
- setAp0()
: ArmISA::TableWalker::L1Descriptor
, ArmISA::TableWalker::L2Descriptor
- setArchCCReg()
: FullO3CPU< Impl >
- setArchFloatReg()
: FullO3CPU< Impl >
- setArchFloatRegInt()
: FullO3CPU< Impl >
- setArchIntReg()
: FullO3CPU< Impl >
- setASID()
: BaseDynInst< Impl >
- setAsid()
: Request
- setAtCommit()
: BaseDynInst< Impl >
- setAttr()
: ArmISA::TLB
, KvmDevice
- setAttributes()
: ArmISA::TlbEntry
- setAttrPtr()
: KvmDevice
- setBackingStore()
: AbstractMemory
- setBadAddress()
: Packet
- setBCD()
: Intel8254Timer::Counter
- setBE()
: Packet
- setBits()
: BitfieldBackend::BitfieldBase< Data >
, SatCounter
- setBlockCached()
: Packet
- setBlocked()
: BaseCache::CacheSlavePort
, BaseCache
- setBrkPoint()
: MemState
- setByte()
: DataBlock
, SubBlock
- setCache()
: AbstractReplacementPolicy
, BasePrefetcher
, BaseTags
- setCacheResponding()
: Packet
- setCallback()
: NoMaliGpu
- setCallbacks()
: DRAMSim2Wrapper
- setCanCommit()
: BaseDynInst< Impl >
- setCanIssue()
: BaseDynInst< Impl >
- setCCEntry()
: UnifiedRenameMap
- setCCReg()
: CheckerThreadContext< TC >
, FullO3CPU< Impl >
, O3ThreadContext< class >
, PhysRegFile
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setCCRegFlat()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setCCRegOperand()
: BaseDynInst< Impl >
, BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
- setClockedObject()
: PowerModel
, PowerModelState
- setCOE()
: FDEntry
- setCommitStage()
: DefaultRename< Impl >
- setCommitted()
: BaseDynInst< Impl >
- setCompareValue()
: ArchTimer
- setComplete()
: IdeDisk
- setCompleted()
: BaseDynInst< Impl >
- setConfigAddress()
: X86ISA::GpuTLB
, X86ISA::TLB
- setConsumer()
: MessageBuffer
, TimerTable
, WireBuffer
- setContext()
: ArmISA::Decoder
, Request
, SparcISA::Decoder
, Wavefront
- setContextId()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, ThreadContext
, ThreadState
- setControl()
: ArchTimer
- setController()
: IdeDisk
, Prefetcher
, RubyPort
- setControlReg()
: ArmISA::PMU
- setCounterTypeRegister()
: ArmISA::PMU
- setCounterValue()
: ArmISA::PMU
- setCPSeq()
: Trace::InstRecord
- setCPU()
: AlphaISA::Interrupts
, ArmISA::Interrupts
, MipsISA::Interrupts
, PowerISA::Interrupts
, RiscvISA::Interrupts
, SparcISA::Interrupts
, X86ISA::Interrupts
- setCPUID()
: X86KvmCPU
- setCurTick()
: EventManager
, EventQueue
- setData()
: DataBlock
, Packet
, Trace::InstRecord
- setDataFromBlock()
: Packet
- setDcachePort()
: CheckerCPU
, LSQUnit< Impl >
- setDebugRegisters()
: X86KvmCPU
- setDecodeQueue()
: DefaultDecode< Impl >
, DefaultRename< Impl >
- setDelayedCommit()
: StaticInst
- setDelayLoop()
: LinuxAlphaSystem
, LinuxMipsSystem
- setDescription()
: TimerTable
, WireBuffer
- setDeviceStatus()
: VirtIODeviceBase
- setDir()
: CheckpointIn
- setDirectedTester()
: DirectedGenerator
- setDirectory()
: OutputDirectory
- setDirty()
: VncInput
, VncServer
- setDistInt()
: DistEtherLink::RxLink
, DistEtherLink::TxLink
- setDmaComplete()
: IdeController
- setDrainState()
: Minor::Execute
- setEA()
: BaseDynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
- setEncodings()
: VncServer
- setEndType()
: PipeFDEntry
- setEntry()
: SimpleRenameMap
, UnifiedRenameMap
- setExcAcRel()
: ArmISA::Memory64
- setExceptionState()
: MipsISA::MipsFaultBase
- setExecuted()
: BaseDynInst< Impl >
- setExpression()
: ObjectMatch
- setExpressSnoop()
: Packet
- setExtraData()
: Request
- setFault()
: DefaultFetch< Impl >::FinishTranslationEvent
, Minor::ForwardLineData
- setFDEntry()
: FDArray
- setFetchQueue()
: DefaultCommit< Impl >
, DefaultDecode< Impl >
, DefaultFetch< Impl >
- setFetchSeq()
: Trace::InstRecord
- setFileName()
: FileFDEntry
- setFileOffset()
: FileFDEntry
- setFirstMicroop()
: StaticInst
- setFlag()
: GPUStaticInst
, StaticInst
- setFlags()
: Event
, HBFDEntry
, Request
, SyscallDesc
- setFloatEntry()
: UnifiedRenameMap
- setFloatReg()
: CheckerThreadContext< TC >
, FullO3CPU< Impl >
, O3ThreadContext< class >
, PhysRegFile
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setFloatRegBits()
: CheckerThreadContext< TC >
, FullO3CPU< Impl >
, O3ThreadContext< class >
, PhysRegFile
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setFloatRegBitsFlat()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setFloatRegFlat()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setFloatRegOperand()
: BaseDynInst< Impl >
, BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
- setFloatRegOperandBits()
: BaseDynInst< Impl >
, BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
- setFPUState()
: BaseKvmCPU
- setFrameBuffer()
: VncInput
- setFreeFU()
: InstructionQueue< Impl >::FUCompletion
- setFreeList()
: DefaultRename< Impl >
- setFreq()
: SystemCounter
- setFromNetQueue()
: Network
- setFSReg()
: SparcISA::ISA
- setFuncargsSize()
: GpuDispatcher
- setFuncExeInst()
: ThreadState
- setFunctionalResponseStatus()
: Packet
- setGenericTimer()
: ArmSystem
- setGic()
: RealView
- setGicReg()
: KvmKernelGicV2
- setGlobalPointer()
: ObjectFile
- setGuestFeatures()
: VirtIODeviceBase
- setHasSharers()
: Packet
- setHotLines()
: AddressProfiler
- setIcachePort()
: CheckerCPU
- setIdleProcess()
: AlphaISA::Kernel::Statistics
- setIEWQueue()
: DefaultCommit< Impl >
, DefaultIEW< Impl >
- setIEWStage()
: DefaultCommit< Impl >
, DefaultRename< Impl >
- setIgnore()
: Trace::Logger
- setImm()
: RegOrImmOperand< RegOperand, T >
- setIncomingLink()
: Message
, MessageBuffer
- setInfo()
: Stats::InfoAccess
- setInIQ()
: BaseDynInst< Impl >
- setInit()
: Stats::InfoAccess
- setInLSQ()
: BaseDynInst< Impl >
- setInROB()
: BaseDynInst< Impl >
- setInst()
: DependencyGraph< DynInstPtr >
- setInstance()
: GpuDispatcher
- setInstListIt()
: BaseDynInst< Impl >
- setIntEntry()
: UnifiedRenameMap
- setInterruptMask()
: Pl011
- setInterrupts()
: HDLcd
, Pl011
- setIntReg()
: CheckerThreadContext< TC >
, FullO3CPU< Impl >
, O3ThreadContext< class >
, PhysRegFile
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setIntRegFlat()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- setIntRegOperand()
: BaseDynInst< Impl >
, BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
- setIntrFreq()
: AlphaSystem
- setIntState()
: KvmKernelGicV2
- setIpr()
: AlphaISA::ISA
- setIQ()
: MemDepUnit< MemDepPred, Impl >
- setIRQLine()
: KvmVM
- setISA()
: ArmISA::BaseISADevice
- setIssued()
: BaseDynInst< Impl >
- setIssueToExecuteQueue()
: InstructionQueue< Impl >
- setIWNextPC()
: ArmISA::ArmStaticInst
- setKernelControl()
: SystemCounter
- setKeyboard()
: VncInput
- setLaneAddr()
: CallArgMem
- setLastEnqueueTime()
: Message
- setLastMicroop()
: StaticInst
- setLE()
: Packet
- setLevel()
: Logger
- setLinkConsumer()
: NetworkLink
- setLocalInt()
: DistEtherLink::Link
- setLocked()
: AbstractCacheEntry
, CacheMemory
- setM5Reg()
: X86ISA::Decoder
- setMask()
: WriteMask
- setMaxSize()
: flitBuffer
- setMaxStackSize()
: MemState
- setMem()
: Trace::InstRecord
- setMemoryMode()
: System
- setMemSpaceConfigFlags()
: Request
- setMipsAccess()
: MipsSystem
- setMiscReg()
: AlphaISA::ISA
, ArmISA::BaseISADevice
, ArmISA::DummyISADevice
, ArmISA::ISA
, ArmISA::PMU
, BaseO3DynInst< Impl >
, CheckerCPU
, CheckerThreadContext< TC >
, ExecContext
, FullO3CPU< Impl >
, GenericTimer
, GenericTimerISA
, Minor::ExecContext
, MipsISA::ISA
, O3ThreadContext< class >
, PowerISA::ISA
, ProxyThreadContext< TC >
, RiscvISA::ISA
, SimpleExecContext
, SimpleThread
, SparcISA::ISA
, ThreadContext
, X86ISA::ISA
- setMiscRegNoEffect()
: AlphaISA::ISA
, ArmISA::ISA
, CheckerCPU
, CheckerThreadContext< TC >
, FullO3CPU< Impl >
, MipsISA::ISA
, O3ThreadContext< class >
, PowerISA::ISA
, ProxyThreadContext< TC >
, RiscvISA::ISA
, SimpleThread
, SparcISA::ISA
, ThreadContext
, X86ISA::ISA
- setMiscRegOperand()
: BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
- setMmapEnd()
: MemState
- setMMU()
: ArmISA::TableWalker
, ArmISA::TLB
- setMode()
: Intel8254Timer::Counter
- setMouse()
: VncInput
- setMRU()
: CacheMemory
- setMsgCounter()
: Message
- setMSR()
: X86KvmCPU
- setMSRs()
: X86KvmCPU
- setName()
: CxxConfigParams
, Stats::Info
- setNetDest()
: NetDest
- setNextPC()
: ArmISA::ArmStaticInst
- setNextThreadStackBase()
: MemState
- setNode()
: ThermalDomain
, ThermalReference
- setNodes()
: ThermalCapacitor
, ThermalResistor
- setNoFault()
: WholeTranslationState
- setNPC()
: CheckerThreadContext< TC >
, GenericISA::SimplePCState< MachInst >
, SimpleThread
, ThreadContext
, X86ISA::PCState
- setOffset()
: ArchTimer
- setOneReg()
: BaseKvmCPU
- setPaddr()
: Request
- setPageTable()
: SETranslatingPortProxy
- setParam()
: CxxConfigManager
, CxxConfigParams
- setParams()
: Stats::InfoAccess
- setParamVector()
: CxxConfigManager
, CxxConfigParams
- setParent()
: ConditionRegisterState
, LdsState
, VecRegisterState
, VectorRegisterFile
, Wavefront
- setPC()
: Request
- setPeer()
: EtherInt
- setpgid()
: Process
- setPhys()
: Request
- setPipeReadSource()
: PipeFDEntry
- setPixelFormat()
: VncServer
- setPnum()
: X86ISA::PageTableOps
- setPortConnectionCount()
: CxxConfigParams
- setPPI()
: KvmKernelGicV2
- setPredicate()
: BaseDynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, ProxyThreadContext< TC >
, SimpleExecContext
, SimpleThread
, Trace::InstRecord
- setPredTaken()
: BaseDynInst< Impl >
- setPredTarg()
: BaseDynInst< Impl >
- setPriority()
: MessageBuffer
- setPrivateSize()
: HsailCode
- setProcess()
: SETranslatingPortProxy
- setProcessPtr()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, ThreadContext
, ThreadState
- setPTEFields()
: X86ISA::PageTableOps
- setQueueAddress()
: VirtIODeviceBase
- setQueueSelect()
: VirtIODeviceBase
- SETranslatingPortProxy()
: SETranslatingPortProxy
- setRaw()
: Packet
- setReadonlyData()
: HsaCode
- setReadSignal()
: UFSHostDevice::UFSSCSIDevice
- setReg()
: Scoreboard
, X86ISA::Interrupts
- setRegArrayBit()
: X86ISA::Interrupts
- setRegisters()
: BaseKvmCPU
- setRegMask()
: MipsISA::ISA
- setRegNoEffect()
: X86ISA::Interrupts
- setRegOtherThread()
: BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, Minor::ExecContext
, SimpleExecContext
, ThreadContext
- setRegs()
: AlphaISA::RemoteGDB::AlphaGdbRegCache
, ArmISA::RemoteGDB::AArch32GdbRegCache
, ArmISA::RemoteGDB::AArch64GdbRegCache
, BaseRemoteGDB::BaseGdbRegCache
, MipsISA::RemoteGDB::MipsGdbRegCache
, PowerISA::RemoteGDB::PowerGdbRegCache
, RiscvISA::RemoteGDB::RiscvGdbRegCache
, SparcISA::RemoteGDB::SPARC64GdbRegCache
, SparcISA::RemoteGDB::SPARCGdbRegCache
, X86ISA::RemoteGDB::AMD64GdbRegCache
, X86ISA::RemoteGDB::X86GdbRegCache
- setRenameMap()
: DefaultCommit< Impl >
, DefaultRename< Impl >
- setRenameQueue()
: DefaultCommit< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
- setReq()
: DefaultFetch< Impl >::FinishTranslationEvent
- setReqInstSeqNum()
: Request
- setRequestFlags()
: GPUDynInst
- setResponderHadWritable()
: Packet
- setRestartAddress()
: AlphaISA::AlphaFault
, AlphaISA::InterruptFault
- setResult()
: BaseDynInst< Impl >
, CheckerCPU
- setResultReady()
: BaseDynInst< Impl >
- setRetryResp()
: LdsState
- setRiscvAccess()
: RiscvSystem
- setROB()
: DefaultCommit< Impl >
- setRW()
: Intel8254Timer::Counter
- setRxInt()
: EtherLink::Link
- setScoreboard()
: DefaultIEW< Impl >
, DefaultRename< Impl >
- setSeg()
: X86ISA::EmulEnv
- setSelfDelete()
: ArmISA::Stage2LookUp
- setSeparator()
: Stats::DataWrap< Derived, InfoProxyType >
, Stats::Info
- setSerializeAfter()
: BaseDynInst< Impl >
- setSerializeBefore()
: BaseDynInst< Impl >
- setSerializeHandled()
: BaseDynInst< Impl >
- setSetIndex()
: AbstractCacheEntry
- setSignal()
: UFSHostDevice::UFSSCSIDevice
- setSignalMask()
: BaseKvmCPU
- setSimFD()
: HBFDEntry
- setSimObject()
: CxxConfigParams
- setSimObjectVector()
: CxxConfigParams
- setSingleStep()
: BaseRemoteGDB
- setSize()
: Packet
, Set
- setSkipped()
: Minor::LSQ::LSQRequest
- setSlavePorts()
: SnoopFilter
- setSourceQueue()
: NetworkLink
- setSpecialRegisters()
: BaseKvmCPU
- setSPI()
: KvmKernelGicV2
- setSquashed()
: BaseDynInst< Impl >
- setSquashedInIQ()
: BaseDynInst< Impl >
- setSquashedInLSQ()
: BaseDynInst< Impl >
- setSquashedInROB()
: BaseDynInst< Impl >
- setStackBase()
: MemState
- setStackMin()
: MemState
- setStackSize()
: MemState
- setState()
: Minor::LSQ::LSQRequest
, OutVcState
- setStatus()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
, ThreadState
- setStCondFailures()
: BaseDynInst< Impl >
, CheckerCPU
, CheckerThreadContext< TC >
, ExecContext
, Minor::ExecContext
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleExecContext
, SimpleThread
, ThreadContext
- setString()
: X86ISA::SMBios::SMBiosStructure
- setSubSystem()
: ThermalDomain
- setSuppressFuncError()
: Packet
- setSyndrome()
: ArmISA::ArmFault
- setSyscallArg()
: AlphaProcess
, ArmProcess32
, ArmProcess64
, MipsProcess
, PowerLinuxProcess
, PowerProcess
, Process
, RiscvProcess
, Sparc32Process
, Sparc64Process
, X86ISA::I386Process
, X86ISA::X86_64Process
- setSyscallReturn()
: AlphaProcess
, ArmProcess32
, ArmProcess64
, MipsProcess
, PowerProcess
, Process
, RiscvProcess
, SparcProcess
, X86ISA::X86Process
- setSystem()
: CheckerCPU
, KvmVM
- setTableAddr()
: X86ISA::IntelMP::FloatingPointer
, X86ISA::SMBios::SMBiosTable
- setTail()
: Minor::InputBuffer< ElemType, ReportTraits, BubbleTraits >
- setTempBreakpoint()
: BaseRemoteGDB
- setTemperature()
: PowerModelState
- setTestInterface()
: ArmISA::TLB
- setTextBase()
: ObjectFile
- setThreadId()
: CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, ThreadContext
, ThreadState
- setThreads()
: DefaultCommit< Impl >
- setThreadState()
: BaseDynInst< Impl >
- setTick()
: Time
- setTid()
: BaseDynInst< Impl >
- setTime()
: MC146818
- setTimeBuffer()
: DefaultCommit< Impl >
, DefaultDecode< Impl >
, DefaultFetch< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
, InstructionQueue< Impl >
- setTimer()
: Time
- setTimerValue()
: ArchTimer
- setTlb()
: ArmISA::TableWalker
- setTLB()
: X86ISA::Walker
- setTlbExceptionState()
: MipsISA::TlbFault< T >
- setTo()
: Intel8254Timer::Counter::CounterEvent
- setToNetQueue()
: Network
- setTotalWrite()
: UFSHostDevice::UFSSCSIDevice
- setTranslateLatency()
: Request
- setTSSAddress()
: KvmVM
- setTxInt()
: EtherLink::Link
- setType()
: NetworkLink
- setupASNReg()
: AlphaProcess
- setupAsyncIO()
: PollQueue
- setupCounters()
: BaseKvmCPU
- setupFetchRequest()
: BaseSimpleCPU
- setupFuncEvents()
: AlphaSystem
, LinuxAlphaSystem
- setupInstCounter()
: BaseKvmCPU
- setupInstStop()
: BaseKvmCPU
- setupMemSlot()
: KvmVM
- setupSignalHandler()
: BaseKvmCPU
- setupWalk()
: X86ISA::Walker::WalkerState
- setUserMemoryRegion()
: KvmVM
- setValue()
: IniFile::Entry
- setValues()
: UFSHostDevice
- setVCpuEvents()
: X86KvmCPU
- setVirt()
: ArmISA::Stage2MMU::Stage2Translation
, Request
- setVnet()
: Message
, MessageBuffer
- setWallclock()
: Time
- setWayAllocationMax()
: BaseSetAssoc
, BaseTags
- setWayIndex()
: AbstractCacheEntry
- setWhen()
: Event
, Trace::InstRecord
- setXCRs()
: X86KvmCPU
- setXSave()
: X86KvmCPU
- sh()
: ArmISA::TableWalker::LongDescriptor
- Shader()
: Shader
- shareable()
: ArmISA::TableWalker::DescriptorBase
, ArmISA::TableWalker::L1Descriptor
, ArmISA::TableWalker::L2Descriptor
- shift_carry_imm()
: ArmISA::ArmStaticInst
- shift_carry_rs()
: ArmISA::ArmStaticInst
- shift_rm_imm()
: ArmISA::ArmStaticInst
- shift_rm_rs()
: ArmISA::ArmStaticInst
- ShiftInst()
: HsailISA::ShiftInst< DataType >
- shiftReg64()
: ArmISA::ArmStaticInst
- shortest_path()
: Topology
- shortest_path_to_node()
: Topology
- ShrMemUnitId()
: ComputeUnit
- sideffect()
: SparcISA::PageTableEntry
- signalDrainDone()
: Drainable
, DrainManager
, MinorCPU
- signalInterrupt()
: X86ISA::I82094AA
, X86ISA::I8259
, X86ISA::IntDevice
- signalPerfLevelUpdate()
: SrcClockDomain
- signedOp()
: X86ISA::MediaOpBase
- signedPick()
: X86ISA::X86StaticInst
- SIMDFloatingPointFault()
: X86ISA::SIMDFloatingPointFault
- SimObject()
: SimObject
- simObjectCreate()
: CxxConfigParams
- SimObjectResolver()
: CxxConfigManager::SimObjectResolver
- simPalCheck()
: BaseO3DynInst< Impl >
, CheckerCPU
, ExecContext
, FullO3CPU< Impl >
, Minor::ExecContext
, SimpleExecContext
, SimpleThread
- SimpleDisk()
: SimpleDisk
- SimpleExecContext()
: SimpleExecContext
- SimpleExtLink()
: SimpleExtLink
- SimpleFlag()
: Debug::SimpleFlag
- SimpleFreeList()
: SimpleFreeList
- SimpleIntLink()
: SimpleIntLink
- SimpleMemory()
: SimpleMemory
- SimpleNetwork()
: SimpleNetwork
- SimplePCState()
: GenericISA::SimplePCState< MachInst >
- SimplePoolManager()
: SimplePoolManager
- SimpleRenameMap()
: SimpleRenameMap
- SimpleThread()
: SimpleThread
- SimpleTimingPort()
: SimpleTimingPort
- SimpleTrace()
: SimpleTrace
- SimPoint()
: SimPoint
- SingleDataRequest()
: Minor::LSQ::SingleDataRequest
- SingleStepEvent()
: BaseRemoteGDB::SingleStepEvent
- sinkPacket()
: CoherentXBar
- size()
: AbstractMemory
, AddrRange
, AddrRangeMap< V >
, AlphaISA::RemoteGDB::AlphaGdbRegCache
, ArmISA::RemoteGDB::AArch32GdbRegCache
, ArmISA::RemoteGDB::AArch64GdbRegCache
, AtagHeader
, BaseRemoteGDB::BaseGdbRegCache
, ChunkGenerator
, CircleBuf< T >
, CowDiskImage
, DiskImage
, DmaReadFifo
, EtherSwitch::Interface::PortFifo
, Fifo< T >
, FUPool
, Histogram
, LdsChunk
, MipsISA::RemoteGDB::MipsGdbRegCache
, Net::EthAddr
, Net::EthHdr
, Net::Ip6Hdr
, Net::IpHdr
, Net::TcpHdr
, Net::TcpOpt
, Net::UdpHdr
, PacketFifo
, PacketQueue
, PowerISA::RemoteGDB::PowerGdbRegCache
, RawDiskImage
, RiscvISA::RemoteGDB::RiscvGdbRegCache
, SparcISA::PageTableEntry
, SparcISA::RemoteGDB::SPARC64GdbRegCache
, SparcISA::RemoteGDB::SPARCGdbRegCache
, SparcISA::TlbMap
, Stats::AvgSampleStor
, Stats::BinaryNode< Op >
, Stats::ConstNode< T >
, Stats::ConstVectorNode< T >
, Stats::DistBase< Derived, Stor >
, Stats::DistProxy< Stat >
, Stats::DistStor
, Stats::Formula
, Stats::FormulaInfoProxy< Stat >
, Stats::FormulaNode
, Stats::HistStor
, Stats::Node
, Stats::ProxyInfo
, Stats::SampleStor
, Stats::ScalarBase< Derived, Stor >
, Stats::ScalarProxy< Stat >
, Stats::ScalarProxyNode< Stat >
, Stats::ScalarStatNode
, Stats::SparseHistBase< Derived, Stor >
, Stats::SparseHistStor
, Stats::SumNode< Op >
, Stats::UnaryNode< Op >
, Stats::ValueBase< Derived >
, Stats::Vector2dBase< Derived, Stor >
, Stats::VectorBase< Derived, Stor >
, Stats::VectorDistBase< Derived, Stor >
, Stats::VectorDistInfo
, Stats::VectorDistInfoProxy< Stat >
, Stats::VectorInfo
, Stats::VectorInfoProxy< Stat >
, Stats::VectorProxy< Stat >
, Stats::VectorStatNode
, VirtDescriptor
, X86ISA::PCState
, X86ISA::RemoteGDB::AMD64GdbRegCache
, X86ISA::RemoteGDB::X86GdbRegCache
- sizeMask()
: SparcISA::PageTableEntry
- sizeParam()
: DistIface
- skidCount()
: DefaultIEW< Impl >
- skidInsert()
: DefaultDecode< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
- skidsEmpty()
: DefaultDecode< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
- SkipCalibrateClocksEvent()
: FreebsdAlphaSystem::SkipCalibrateClocksEvent
- SkipDelayLoopEvent()
: LinuxAlphaSystem::SkipDelayLoopEvent
, LinuxMipsSystem::SkipDelayLoopEvent
- skipFaultingInstruction()
: AlphaISA::AlphaFault
, AlphaISA::ArithmeticFault
, AlphaISA::PalFault
- SkipFuncEvent()
: SkipFuncEvent
- skippedMemAccess()
: Minor::LSQ::LSQRequest
- SlavePort()
: SlavePort
- smallestElement()
: NetDest
, Set
- SMBiosHeader()
: X86ISA::SMBios::SMBiosTable::SMBiosHeader
- SMBiosStructure()
: X86ISA::SMBios::SMBiosStructure
- SMBiosTable()
: X86ISA::SMBios::SMBiosTable
- sn()
: AtagSerial
- snoopAll()
: SnoopFilter
- snoopDown()
: SnoopFilter
- SnoopFilter()
: SnoopFilter
- SnoopRespLayer()
: BaseXBar::SnoopRespLayer
- SnoopRespPacketQueue()
: SnoopRespPacketQueue
- SnoopRespPort()
: CoherentXBar::SnoopRespPort
- snoopSelected()
: SnoopFilter
- SocketDataEvent()
: VirtIO9PSocket::SocketDataEvent
- socketDisconnect()
: VirtIO9PSocket
- socketId()
: BaseDynInst< Impl >
, CheckerThreadContext< TC >
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, ThreadContext
, ThreadState
- softInt()
: Pl390
- SoftwareInterrupt()
: X86ISA::SoftwareInterrupt
- solve()
: LinearSystem
- sortInsts()
: DefaultDecode< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
- sortTime()
: DRAMCtrl
- sortValue()
: PciBusAddr
- SouthBridge()
: SouthBridge
- Sp804()
: Sp804
- SPAlignmentFault()
: ArmISA::SPAlignmentFault
- Sparc32LinuxProcess()
: SparcISA::Sparc32LinuxProcess
- Sparc32Process()
: Sparc32Process
- Sparc64LinuxProcess()
: SparcISA::Sparc64LinuxProcess
- Sparc64Process()
: Sparc64Process
- SparcNativeTrace()
: Trace::SparcNativeTrace
- SparcProcess()
: SparcProcess
- SparcSolarisProcess()
: SparcISA::SparcSolarisProcess
- SparcSystem()
: SparcSystem
- SparseHistBase()
: Stats::SparseHistBase< Derived, Stor >
- SparseHistInfoProxy()
: Stats::SparseHistInfoProxy< Stat >
- SparseHistPrint()
: Stats::SparseHistPrint
- SparseHistStor()
: Stats::SparseHistStor
- spawnRecvThread()
: DistIface
- spBypassLength()
: ComputeUnit
- Speaker()
: X86ISA::Speaker
- SpecialDataRequest()
: Minor::LSQ::SpecialDataRequest
- SpecialInst1Src()
: HsailISA::SpecialInst1Src< DestDataType >
- SpecialInst1SrcBase()
: HsailISA::SpecialInst1SrcBase< DestOperandType >
- SpecialInstNoSrc()
: HsailISA::SpecialInstNoSrc< DestDataType >
- SpecialInstNoSrcBase()
: HsailISA::SpecialInstNoSrcBase< DestOperandType >
- SpecialInstNoSrcNoDest()
: HsailISA::SpecialInstNoSrcNoDest
- specLoopUpdate()
: LTAGE
- SpillNNormal()
: SparcISA::SpillNNormal
- SpillNOther()
: SparcISA::SpillNOther
- SplitDataRequest()
: Minor::LSQ::SplitDataRequest
- SplitFragmentSenderState()
: TimingSimpleCPU::SplitFragmentSenderState
- splitOnVaddr()
: Request
- splitRequest()
: BaseDynInst< Impl >
- sport()
: Net::TcpHdr
, Net::UdpHdr
- spsrWriteByInstr()
: ArmISA::ArmStaticInst
- SQCPort()
: ComputeUnit::SQCPort
- sqEmpty()
: LSQ< Impl >
, LSQUnit< Impl >
- SQEntry()
: LSQUnit< Impl >::SQEntry
- sqFull()
: LSQ< Impl >
, LSQUnit< Impl >
- squash()
: BiModeBP
, BPredUnit
, DefaultDecode< Impl >
, DefaultFetch< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
, Event
, IndirectPredictor
, InstructionQueue< Impl >
, LocalBP
, LSQ< Impl >
, LSQUnit< Impl >
, LTAGE
, MemDepUnit< MemDepPred, Impl >
, ROB< Impl >
, StoreSet
, TournamentBP
- squashAfter()
: DefaultCommit< Impl >
- squashAll()
: DefaultCommit< Impl >
- squashDueToBranch()
: DefaultIEW< Impl >
- squashDueToMemOrder()
: DefaultIEW< Impl >
- squashed()
: BaseTLB::Translation
, DataTranslation< ExecContextPtr >
, Event
- squashFromDecode()
: DefaultFetch< Impl >
- squashFromSquashAfter()
: DefaultCommit< Impl >
- squashFromTC()
: DefaultCommit< Impl >
, FullO3CPU< Impl >
- squashFromTrap()
: DefaultCommit< Impl >
- squashInstIt()
: FullO3CPU< Impl >
- src()
: Net::EthHdr
, Net::Ip6Hdr
, Net::IpHdr
- SrcClockDomain()
: SrcClockDomain
- srcRegIdx()
: BaseDynInst< Impl >
, StaticInst
- SrsOp()
: ArmISA::SrsOp
- SSDReadDone()
: UFSHostDevice::UFSSCSIDevice
- SSDReadStart()
: UFSHostDevice::UFSSCSIDevice
- SSDWriteDone()
: UFSHostDevice::UFSSCSIDevice
- SSDWriteStart()
: UFSHostDevice::UFSSCSIDevice
- ssrr()
: Net::IpOpt
- StackDistCalc()
: StackDistCalc
- StackDistProbe()
: StackDistProbe
- StackFault()
: X86ISA::StackFault
- StackTrace()
: AlphaISA::StackTrace
, ArmISA::StackTrace
, MipsISA::StackTrace
, PowerISA::StackTrace
, RiscvISA::StackTrace
, X86ISA::StackTrace
- stage1Tlb()
: ArmISA::Stage2MMU
- Stage2LookUp()
: ArmISA::Stage2LookUp
- Stage2MMU()
: ArmISA::Stage2MMU
- stage2Tlb()
: ArmISA::Stage2MMU
- Stage2Translation()
: ArmISA::Stage2MMU::Stage2Translation
- stallBuffer()
: AbstractController
- stallMessage()
: MessageBuffer
- stallPort()
: ComputeUnit::DTLBPort
, ComputeUnit::ITLBPort
, ComputeUnit::LDSPort
- StandardDeviation()
: Stats::StandardDeviation
- start()
: AbstractMemory
, AddrRange
, BasePixelPump
, DistIface::SyncEvent
, PerfKvmCounter
, Ticked
, Wavefront
, X86ISA::Walker
- StartAddr()
: LinuxAlphaSystem
, LinuxMipsSystem
- startAddrTranslation()
: Minor::LSQ::LSQRequest
, Minor::LSQ::SingleDataRequest
, Minor::LSQ::SpecialDataRequest
, Minor::LSQ::SplitDataRequest
- startCommand()
: IdeDisk
- startDiod()
: VirtIO9PDiod
- startDisassembly()
: ArmISA::Memory64
- startDma()
: IdeDisk
, Pl111
- startFill()
: DmaReadFifo
- startFrame()
: HDLcd::DmaEngine
- startFunctional()
: X86ISA::Walker
, X86ISA::Walker::WalkerState
- startRead()
: MemChecker::ByteTracker
, MemChecker
- startup()
: AlphaBackdoor
, AlphaISA::ISA
, AlphaSystem
, ArmISA::ISA
, ArmKvmCPU
, ArmV8KvmCPU
, BaseArmKvmCPU
, BaseKvmCPU
, BaseSimpleCPU
, CommMonitor
, CxxConfigManager
, DistEtherLink
, DistIface
, DRAMCtrl::Rank
, DRAMCtrl
, DRAMSim2
, EnergyCtrl
, FreebsdArmSystem
, FullO3CPU< Impl >
, Intel8254Timer::Counter
, Intel8254Timer
, LinuxArmSystem
, MaltaIO
, MathExprPowerModel
, MC146818
, MinorCPU
, MipsISA::ISA
, MuxingKvmGic
, PowerISA::ISA
, RealViewOsc
, RiscvISA::ISA
, RubySystem
, SimObject
, SimpleThread
, SparcISA::ISA
, SrcClockDomain
, ThermalModel
, TsunamiIO
, VirtIO9PDiod
, VirtIO9PSocket
, VoltageDomain
, X86ISA::Cmos
, X86ISA::I8254
, X86ISA::ISA
, X86KvmCPU
- StartupInterrupt()
: X86ISA::StartupInterrupt
- startupStage()
: DefaultCommit< Impl >
, DefaultDecode< Impl >
, DefaultFetch< Impl >
, DefaultIEW< Impl >
, DefaultRename< Impl >
- startupThread()
: BaseKvmCPU
- startWalk()
: X86ISA::Walker::WalkerState
- startWalkWrapper()
: X86ISA::Walker
- startWavefront()
: ComputeUnit
- StartWorkgroup()
: ComputeUnit
- startWrite()
: MemChecker::ByteTracker
, MemChecker
, MemChecker::WriteCluster
- state()
: DrainManager
- StatEvent()
: Stats::StatEvent
- StaticInst()
: StaticInst
- staticInstruction()
: GPUDynInst
- Statistics()
: AlphaISA::Kernel::Statistics
, ArmISA::Kernel::Statistics
, Kernel::Statistics
, MipsISA::Kernel::Statistics
, PowerISA::Kernel::Statistics
, RiscvISA::Kernel::Statistics
, SparcISA::Kernel::Statistics
, X86ISA::Kernel::Statistics
- statReset()
: MemFootprintProbe
- StatsCallback()
: AbstractController::StatsCallback
, Network::StatsCallback
- StatStor()
: Stats::StatStor
- status()
: CheckerThreadContext< TC >
, Debug::SimpleFlag
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
, ThreadState
- statusCheck()
: UFSHostDevice::UFSSCSIDevice
- step()
: Minor::LSQ
, Minor::LSQ::StoreBuffer
- stepQueues()
: Minor::Fetch1
- stepToNextPacket()
: Minor::LSQ::LSQRequest
, Minor::LSQ::SingleDataRequest
, Minor::LSQ::SpecialDataRequest
, Minor::LSQ::SplitDataRequest
- stepWalk()
: X86ISA::Walker::WalkerState
- StInst()
: HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >
- StInstBase()
: HsailISA::StInstBase< MemDataType, SrcOperandType, AddrOperandType >
- stop()
: BasePixelPump
, PerfKvmCounter
, Ticked
- stopFill()
: DmaReadFifo
- stopPolling()
: EtherTapBase
- StorageElement()
: StorageElement
- StorageMap()
: StorageMap
- StorageSpace()
: StorageSpace
- store()
: StoreTrace
- StoreBuffer()
: Minor::LSQ::StoreBuffer
- storeBusLength()
: ComputeUnit
- storeData()
: LdsState::CuSidePort
- storeEventInfo()
: Consumer
, PerfectSwitch
- storePostSend()
: LSQUnit< Impl >
- StoreSet()
: StoreSet
- StoreTrace()
: StoreTrace
- str()
: Stats::BinaryNode< Op >
, Stats::ConstNode< T >
, Stats::ConstVectorNode< T >
, Stats::Formula
, Stats::FormulaInfo
, Stats::FormulaInfoProxy< Stat >
, Stats::FormulaNode
, Stats::Node
, Stats::OpString< std::divides< Result > >
, Stats::OpString< std::minus< Result > >
, Stats::OpString< std::modulus< Result > >
, Stats::OpString< std::multiplies< Result > >
, Stats::OpString< std::negate< Result > >
, Stats::OpString< std::plus< Result > >
, Stats::ProxyInfo
, Stats::ScalarProxy< Stat >
, Stats::ScalarProxyNode< Stat >
, Stats::ScalarStatNode
, Stats::SumNode< Op >
, Stats::UnaryNode< Op >
, Stats::ValueBase< Derived >
, Stats::VectorStatNode
- stream()
: OutputStream
- strictlyOrdered()
: BaseDynInst< Impl >
- StrideEntry()
: StridePrefetcher::StrideEntry
- StridePrefetcher()
: StridePrefetcher
- string()
: Net::EthAddr
, Net::IpAddress
, Net::IpNetmask
, Net::IpWithPort
- StringWrap()
: StringWrap
- stripes()
: AddrRange
- Stub()
: HsailISA::Stub
- StubSlavePort()
: StubSlavePort
- SubBlock()
: SubBlock
- subdesc()
: Stats::DataWrapVec< Derived, InfoProxyType >
- submitIO()
: BaseKvmCPU::KVMCpuPort
- subname()
: Stats::DataWrapVec< Derived, InfoProxyType >
- SubSystem()
: SubSystem
- succeededTiming()
: BaseXBar::Layer< SrcType, DstType >
- successful()
: SyscallReturn
- sum()
: Net::IpHdr
, Net::TcpHdr
, Net::UdpHdr
- SumNode()
: Stats::SumNode< Op >
- supersection()
: ArmISA::TableWalker::L1Descriptor
- SupervisorCall()
: ArmISA::SupervisorCall
- SupervisorTrap()
: ArmISA::SupervisorTrap
- suppressFuncError()
: Packet
- suspend()
: BasePixelPump::PixelEvent
, CheckerThreadContext< TC >
, DRAMCtrl::Rank
, FutexMap
, O3ThreadContext< class >
, ProxyThreadContext< TC >
, SimpleThread
, ThreadContext
- suspendContext()
: AtomicSimpleCPU
, BaseKvmCPU
, FullO3CPU< Impl >
, MinorCPU
, TimingSimpleCPU
- Swap()
: ArmISA::Swap
- swapActiveThread()
: BaseSimpleCPU
- swAq()
: CPA
- swAutoBegin()
: CPA
- swDq()
: CPA
- swEnd()
: CPA
- swExplictBegin()
: CPA
- swGetId()
: CPA
- swIdentify()
: CPA
- Switch()
: Switch
- SwitchAllocator()
: SwitchAllocator
- switchingDelay()
: EtherSwitch::Interface
- switchOut()
: AtomicSimpleCPU
, BaseKvmCPU
, Checker< Impl >
, FullO3CPU< Impl >
, MinorCPU
, TimingSimpleCPU
- switchToActive()
: DefaultFetch< Impl >
- switchToInactive()
: DefaultFetch< Impl >
- swLink()
: CPA
- swpipl()
: Kernel::Statistics
- swPq()
: CPA
- swQ()
: CPA
- swRq()
: CPA
- swSmBegin()
: CPA
- swSmEnd()
: CPA
- swSq()
: CPA
- swSyscallLink()
: CPA
- swWe()
: CPA
- swWf()
: CPA
- SymbolTable()
: SymbolTable
- sync()
: Debug::Flag
, Debug::SimpleFlag
- SyncEvent()
: DistIface::SyncEvent
- syncKvmState()
: BaseKvmCPU
- SyncNode()
: DistIface::SyncNode
- SyncSwitch()
: DistIface::SyncSwitch
- syncThreadContext()
: BaseKvmCPU
- syscall()
: BaseO3DynInst< Impl >
, CheckerCPU
, CheckerThreadContext< TC >
, ExecContext
, FullO3CPU< Impl >
, Minor::ExecContext
, O3ThreadContext< class >
, O3ThreadState< class >
, Process
, ProxyThreadContext< TC >
, SimpleExecContext
, SimpleThread
, ThreadContext
, X86ISA::I386Process
- SyscallDesc()
: SyscallDesc
- SyscallFault()
: RiscvISA::SyscallFault
- SyscallRetryFault()
: SyscallRetryFault
- SyscallReturn()
: SyscallReturn
- SysDC64()
: ArmISA::SysDC64
- SysDescTable()
: X86ISA::ACPI::SysDescTable
- system()
: AbstractMemory
- System()
: System
- SystemCounter()
: SystemCounter
- SystemError()
: ArmISA::SystemError
- SystemManagementInterrupt()
: X86ISA::SystemManagementInterrupt
- SystemPort()
: System::SystemPort
Generated on Fri Jun 9 2017 13:04:45 for gem5 by doxygen 1.8.6